HSMP-381x, 481x
Surface Mount RF PIN
Low Distortion Attenuator Diodes
Data Sheet
Description/Applications
The HSMP-381x series is specifically designed for low
distortion attenuator applications. The HSMP-481x
products feature ultra low parasitic inductance in the
SOT-23 and SOT-323 packages. They are specifically
designed for use at frequencies which are much higher
than the upper limit for conventional diodes.
A SPICE model is not available for PIN diodes as
SPICE does not provide for a key PIN diode character-
istic, carrier lifetime.
Features
•
Diodes Optimized for:
– Low Distortion Attenuating
– Microwave FrequencyOperation
•
Surface Mount Packages
– Single and Dual Versions
– Tape and Reel Options Available
•
Low Failure in Time (FIT) Rate
[1]
•
Lead-free Option Available
Note:
1. For more information see the Surface Mount PIN Reliability Data Sheet.
Package Lead Code
Identification, SOT-23
(Top View)
SINGLE
3
SERIES
3
Package Lead Code
Identification, SOT-323
(Top View)
SINGLE
SERIES
1
#0
2
1
#2
2
B
COMMON
ANODE
C
COMMON
CATHODE
COMMON
ANODE
3
COMMON
CATHODE
3
1
#3
2
1
#4
2
E
DUAL CATHODE
F
DUAL CATHODE
3
1
2
4810
481B
2
Absolute Maximum Ratings
[1]
T
C
= +25°C
Symbol
I
f
P
IV
T
j
T
stg
θ
jc
Parameter
Forward Current (1
µs
Pulse)
Peak Inverse Voltage
Junction Temperature
Storage Temperature
Thermal Resistance
[2]
Unit
Amp
V
°C
°C
°C/W
SOT-23
1
Same as V
BR
150
-65 to 150
500
SOT-323
1
Same as V
BR
150
-65 to 150
150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. T
C
= +25°C, where T
C
is defined to be the temperature at the package pins where contact is made
to the circuit board.
Electrical Specifications T
C
= +25°C (Each Diode)
Conventional Diodes
Part
Number
HSMP-
3810
3812
3813
3814
381B
381C
381E
381F
Package
Marking
Code
E0
E2
E3
E4
E0
E2
E3
E4
Minimum
Breakdown
Voltage
V
BR
(V)
100
Maximum
Total
Resistance
R
T
(Ω)
3.0
Maximum
Total
Capacitance
C
T
(pF)
0.35
Minimum
High
Resistance
R
H
(Ω)
1500
Maximum
Low
Resistance
R
L
(Ω)
10
Lead
Code
0
2
3
4
B
C
E
F
Configuration
Single
Series
Common Anode
Common Cathode
Single
Series
Common Anode
Common Cathode
Test Conditions
V
R
= V
BR
Measure
I
R
≤
10
µA
I
F
= 100 mA
f = 100 MHz
V
R
= 50 V
f = 1 MHz
I
R
= 0.01 mA
f = 100 MHz
I
F
= 20 mA
f= 100 MHz
High Frequency (Low Inductance, 500 MHz – 3 GHz) PIN Diodes
Part
Number
HSMP-
4810
481B
Package
Marking
Code
EB
EB
Minimum
Breakdown
Voltage
V
BR
(V)
100
V
R
= V
BR
Measure
I
R
≤
10
µA
Maximum
Series
Resistance
R
S
(Ω)
3.0
I
F
= 100 mA
Typical
Total
Capacitance
C
T
(pF)
0.35
V
R
= 50 V
f = 1 MHz
Maximum
Total
Capacitance
C
T
(pF)
0.4
V
R
= 50 V
f = 1 MHz
V
R
= 0 V
Typical
Total
Inductance
L
T
(nH)
1.0
f = 500 MHz–
3 GHz
Lead
Code
B
B
Configuration
Dual Cathode
Dual Cathode
Test Conditions
3
Typical Parameters at T
C
= 25°C
Part Number
HSMP-
381x
Test Conditions
Series Resistance
R
S
(Ω)
75
I
F
= 1 mA
f = 100 MHz
Carrier Lifetime
τ
(ns)
1500
I
F
= 50 mA
I
R
= 250 mA
Reverse Recovery Time
T
rr
(ns)
300
V
R
= 10 V
I
F
= 20 mA
90% Recovery
Total Capacitance
C
T
(pF)
0.27 @ 50 V
f = 1 MHz
Typical Parameters at T
C
= 25°C (unless otherwise noted), Single Diode
0.45
TOTAL CAPACITANCE (pF)
10000
T
A
= +85°C
T
A
= +25°C
T
A
= –55°C
INPUT INTERCEPT POINT (dBm)
120
RF RESISTANCE (OHMS)
0.40
0.35
1 MHz
0.30
0.25
0.20
frequency>100 MHz
0.15
0
2
4
6
8
10 12 14 16 18 20
30 MHz
1000
Diode Mounted as a
110 Series Attenuator
in a 50 Ohm Microstrip
100 and Tested at 123 MHz
90
80
70
60
50
40
1000
100
10
100
10
1
0.01
0.1
1
10
100
REVERSE VOLTAGE (V)
I
F
– FORWARD BIAS CURRENT (mA)
DIODE RF RESISTANCE (OHMS)
Figure 1. RF Capacitance vs. Reverse
Bias.
Figure 2. RF Resistance vs. Forward
Bias Current.
Figure 3. 2nd Harmonic Input
Intercept Point vs. Diode RF
Resistance.
100
I
F
– FORWARD CURRENT (mA)
Typical Applications for Multiple Diode Products
VARIABLE BIAS
10
1
0.1
125°C 25°C –50°C
0.01
0
0.2
0.4
0.6
0.8
1.0
1.2
V
F
– FORWARD VOLTAGE (mA)
INPUT
RF IN/OUT
Figure 4. Forward Current vs.
Forward Voltage.
FIXED
BIAS
VOLTAGE
Figure 5. Four Diode
π
Attenuator. See Application Note 1048
for Details.
4
Typical Applications for HSMP-481x Low Inductance Series
Microstrip Series Connection for HSMP-481x Series
In order to take full advantage of the low inductance
of the HSMP-481x series when using them in series
applications, both lead 1 and lead 2 should be con-
nected together, as shown in Figure 7.
50 OHM MICROSTRIP LINES
Microstrip Shunt Connections for HSMP-481x Series
In Figure 8, the center conductor of the microstrip
line is interrupted and leads 1 and 2 of the HSMP-481x
series diode are placed across the resulting gap. This
forces the 1.5 nH lead inductance of leads 1 and 2 to
appear as part of a low pass filter, reducing the shunt
parasitic inductance and increasing the maximum avail-
able attenuation. The 0.3 nHof shunt inductance exter-
nal to the diode is created by the via holes, and is a good
estimate for 0.032" thick material.
3
R
j
0.3 pF
PAD CONNECTED TO
GROUND BY TWO
VIA HOLES
Figure 8. Circuit Layout.
1.5 nH
1.5 nH
1
HSMP-481x
2
R
j
≈
0.08
I
b0.9
+ 2.5
0.3 nH
Figure 6. Internal Connections.
0.3 nH
Figure 9. Equivalent Circuit.
Figure 7. Circuit Layout.
5
Typical Applications for HSMP-481x Low Inductance Series (continued)
Co-Planar Waveguide Shunt Connection for
HSMP-481x Series
Co-Planar waveguide, with ground on the top side of
the printed circuit board, is shown in Figure 10. Since
it eliminates the need for via holes to ground, it offers
lower shunt parasitic inductance and higher maximum
attenuation when compared to microstrip circuit.
Co-Planar Waveguide
Groundplane
Center Conductor
Groundplane
Equivalent Circuit Model
HSMS-381x Chip*
R
s
R
j
2.5
Ω
C
j
R
T
= 2.5 + R
j
0.18 pF*
C
T
= C
P
+ C
j
* Measured at -20 V
80
R
j
=
0.9
Ω
I
I = Forward Bias Current in mA
*See AN1124 for package models.
Figure 10. Circuit Layout.
R
j
0.3 pF
0.75 nH
Figure 11. Equivalent Circuit.
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