JANSR2N7380
Qualified Levels:
JANSD, JANSR and
JANSF
Radiation Hardened N-Channel MOSFET
Qualified per MIL-PRF-19500/614
QPL RANGE and RAD LEVEL
Radiation
Level
TID
JANSD2N7380
10 Krad
JANSR2N7380
100 Krad
JANSF2N7380
300 Krad
DESCRIPTION
These products are well suited for Space level applications requiring Total Dose radiation
(TID) tolerance and Single Event capability. This 2N7381 is available in three qualified
radiation levels and is packaged in a hermetic TO-257 outline. These products have all the
same performance features of industry standard MOSFETs and may be used for most voltage
control and fast switching applications.
Important:
For the latest information, visit our website
http://www.microsemi.com.
TO-257AA
Package
FEATURES
•
•
•
•
•
Ease of paralleling
Hermetically sealed package
Low gate charge
Single event hardened for space applications
RHA level JANS qualifications available per MIL-PRF-19500/614.
(See
part nomenclature
for all available options.)
APPLICATIONS / BENEFITS
•
•
•
•
Space level DC-DC converters
Satellite Motor Control circuits
Synchronous rectification
Linear-mode applications
MAXIMUM RATINGS
@ T
C
= +25 ºC unless otherwise stated
Parameters / Test Conditions
Operating & Storage Junction Temperature Range
Thermal Resistance Junction-to-Case (see
Figure 4)
Total Power Dissipation
@ T
A
= +25 °C
@ T
C
= +25 °C
Gate-Source Voltage, dc
(2) (3)
Drain Current, dc @ T
C
= +25 ºC
(2) (3)
Drain Current, dc @ T
C
= +100 ºC
(4)
Off-State Current (Peak Total Value)
Source Current
NOTES:
Symbol
T
J
& T
stg
R
ӨJC
(1)
Value
-55 to +150
1.67
2
75
± 20
14.4
9.1
57.6
14.4
Unit
o
°C
C/W
W
V
A
A
A
A
MSC – Lawrence
6 Lake Street,
Lawrence, MA 01841
Tel: 1-800-446-1158 or
(978) 620-2600
Fax: (978) 689-0803
MSC – Ireland
Gort Road Business Park,
Ennis, Co. Clare, Ireland
Tel: +353 (0) 65 6840044
Fax: +353 (0) 65 6822298
Website:
www.microsemi.com
P
T
V
GS
I
D1
I
D2
I
DM
I
S
1. Derated linearly 0.6 W/ºC for T
C
> +25 ºC
2. The following formula derives the maximum theoretical I
D
limit. I
D
is limited by package and internal
wires and may also be limited by pin diameter:
3. See
Figure 3
for maximum drain current graphs
4. I
DM
= 4 X I
D1
as calculated in note (2)
T4-LDS-0123, Rev. 3 (11/18/13)
©2013 Microsemi Corporation
Page 1 of 7
JANSR2N7380
MECHANICAL and PACKAGING
•
•
•
•
•
•
CASE: Nickel plated copper base & 1020 steel frame
TERMINALS: Solder dipped copper cored 52 alloy plating
MARKING: Alpha numeric
POLARITY: See
Schematic
on last page
WEIGHT: Approximately 3.43 grams
See
Package Dimensions
on last page.
PART NOMENCLATURE
JANSR
Reliability Level
JANSD = 10K Rads (Si)
JANSR = 100K Rads (Si)
JANSF = 300K Rads (Si)
2N7380
JEDEC type number
Symbol
di/dt
I
D
I
DSS
I
F
I
GSS
I
S
r
DS(on)
R
G
V
(BR)DSS
V
DD
V
DG
V
DS
V
GS
SYMBOLS & DEFINITIONS
Definition
Rate of change of diode current while in reverse-recovery mode, recorded as maximum value.
Drain current, dc: The direct current into the drain terminal.
Zero-Gate-Voltage Drain Current: The direct current into the gate terminal when the gate-source voltage is zero.
Forward current: The current flowing from the p-type region to the n-type region.
Reverse-Gate Current, Drain Short-Circuited to Source: The direct current into the gate terminal with a forward gate
source voltage applied (I
GSSF
) or reverse gate source voltage applied (I
GSSF
) and the drain terminal short-circuited to
the source terminal.
Source current, dc: The direct current into the source terminal.
Static Drain-Source On-State Resistance: The dc resistance between the drain and source terminals with a specified
gate-source voltage applied to bias the device to the on state.
Gate drive impedance or Gate resistance
Drain-Source Breakdown Voltage: Gate short-circuited to the source terminal.
Drain supply voltage, dc: The dc supply voltage applied to a circuit connected to the drain terminal.
Drain-gate voltage, dc: The dc voltage between the drain and gate terminals.
Drain source voltage, dc: The dc voltage between the drain terminal and the source terminal.
Gate source voltage, dc: The dc voltage between the gate terminal and the source terminal.
T4-LDS-0123, Rev. 3 (11/18/13)
©2013 Microsemi Corporation
Page 2 of 7
JANSR2N7380
ELECTRICAL CHARACTERISTICS
@ T
A
= +25 °C, unless otherwise noted
Parameters / Test Conditions
PRE-IRRADIATION CHARACTERISTICS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 1.0 mA
Gate-Source Voltage (Threshold)
V
DS
≥ V
GS
, I
D
= 1 mA
V
DS
≥ V
GS
, I
D
= 1 mA, T
J
= +125°C
V
DS
≥ V
GS
, I
D
= 1 mA, T
J
= -55°C
Gate Current
V
GS
= ± 20 V, V
DS
= 0 V
V
GS
= ± 20 V, V
DS
= 0 V, T
J
= +125°C
Drain Current
V
GS
= 0 V, V
DS
= 80 V
Drain Current
V
GS
= 0 V, V
DS
= 80 V, T
J
= +125 °C
Static Drain-Source On-State Resistance
V
GS
= 12 V, I
D
= 9.1 A pulsed
Static Drain-Source On-State Resistance
V
GS
= 12 V, I
D
= 14.4 A pulsed
Static Drain-Source On-State Resistance
T
J
= +125°C
V
GS
= 12 V, I
D
= 9.1 A pulsed
Diode Forward Voltage
V
GS
= 0 V, I
D
= 14.4 A pulsed
DYNAMIC CHARACTERISTICS
Parameters / Test Conditions
Gate Charge:
On-State Gate Charge
V
GS
= 12 V, I
D
= 14.4 A, V
DS
= 50 V
Gate to Source Charge
V
GS
= 12 V, I
D
= 14.4 A, V
DS
= 50 V
Gate to Drain Charge
V
GS
= 12 V, I
D
= 14.4 A, V
DS
= 50 V
SWITCHING CHARACTERISTICS
Parameters / Test Conditions
Turn-on delay time
I
D
= 14.4 A, V
GS
= 12 V, R
G
= 7.5
Ω,
V
DD
Rise time
I
D
= 14.4 A, V
GS
= 12 V, R
G
= 7.5
Ω,
V
DD
Turn-off delay time
I
D
= 14.4 A, V
GS
= 12 V, R
G
= 7.5
Ω,
V
DD
Fall time
I
D
= 14.4 A, V
GS
= 12 V, R
G
= 7.5
Ω,
V
DD
Diode Reverse Recovery Time
di/dt ≤ 100 A/µs, V
DD
≤ 50 V, I
F
= 14.4 A
Symbol
V
(BR)DSS
V
GS(th)1
V
GS(th)2
V
GS(th)3
I
GSS1
I
GSS2
I
DSS1
I
DSS2
r
DS(on)1
r
DS(on)2
Min.
100
2.0
1.0
4.0
5.0
±100
±200
25
0.25
0.18
0.20
nA
µA
mA
Ω
Ω
Ω
V
Max.
Unit
V
V
r
DS(on)3
V
SD
0.35
1.8
Symbol
Q
g(on)
Q
gs
Q
gd
Min.
Max.
40
10
20
Unit
nC
nC
nC
Symbol
= 50 V
= 50 V
= 50 V
= 50 V
t
d(on)
t
r
t
d(off)
t
f
t
rr
Min.
Max.
25
60
40
30
275
Unit
ns
ns
ns
ns
ns
T4-LDS-0123, Rev. 3 (11/18/13)
©2013 Microsemi Corporation
Page 3 of 7
JANSR2N7380
ELECTRICAL CHARACTERISTICS
@ T
A
= +25 °C, unless otherwise noted (continued)
POST-IRRADIATION
Parameters / Test Conditions
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 1 mA
Gate-Source Voltage (Threshold)
V
DS
≥ V
GS
, I
D
= 1.0 mA JANSD, R
V
DS
≥ V
GS
, I
D
= 1.0 mA JANSF
Gate Current
V
GS
= ±20 V, V
DS
= 0 V
Drain Current
V
GS
= 0 V, V
DS
= 80% of V
DS
(pre-irradiated) JANSD, R
V
GS
= 0 V, V
DS
= 80% of V
DS
(pre-irradiated) JANSF
Static Drain-Source On-State Voltage
V
GS
= 12 V, I
D
= 9.1 pulsed JANSD, R
V
GS
= 12 V, I
D
= 9.1 pulsed JANSF
Diode Forward Voltage
V
GS
= 0 V, I
D
= 14.4 pulsed
(1)
Symbol
V
(BR)DSS
V
GS(th)1
V
GS(th)1
I
GSS1
I
DSS1
Min.
100
2.0
1.25
Max.
Unit
V
4.0
4.5
±100
25
50
1.638
2.184
1.8
V
nA
µA
r
DS(on)
V
SD
V
V
NOTE:
1. Post-irradiation electrical characteristics apply to devices subjected to steady state total dose irradiation
testing in accordance with MIL-STD-750, method 1019. Separate samples are tested for V
GS
bias (12V),
and V
DS
bias (80V) conditions.
SAFE OPERATING AREA
I
D
Drain-to-Source Current (A)
V
DS
, Drain-to-Source Voltage (V)
FIGURE 1
T4-LDS-0123, Rev. 3 (11/18/13)
©2013 Microsemi Corporation
Page 4 of 7
JANSR2N7380
GRAPHS
SEE (Single Event Effect) Typical Response:
Heavy Ion testing of the 2N7380 device was completed by similarity of die structure to the 2N7261. The 2N7261
has been characterized at the Texas A&M cyclotron. The following SEE curve has been established using the
elements, LET, range, and Total Energy conditions as shown:
FIGURE 2
V
DS
, Drain Source Voltage, V
V
GS
, Gate Source Voltage, V
It should be noted that total energy levels are considered to be a factor in SEE characterization. Comparisons to
other datasets should not be based on LET alone. Please consult factory for more information.
T4-LDS-0123, Rev. 3 (11/18/13)
©2013 Microsemi Corporation
Page 5 of 7
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