DATA SHEET
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µ
PC1678G
5 V-BIAS, +17.5 dBm OUTPUT, 2.0 GHz WIDEBAND
Si MMIC AMPLIFIER
DESCRIPTION
The
µ
PC1678G is a silicon monolithic integrated circuit designed as medium output power amplifier for high
frequency system applications. Due to +17.5 dBm TYP. output at 2 GHz, this IC is recommendable for transmitter
stage amplifier of L BAND wireless communication systems. This IC is packaged in 8-pin plastic SOP.
This IC is manufactured using NEC’s 20 GHz f
T
NESAT™IV silicon bipolar process. This process uses silicon
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and
prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
FEATURES
• Supply voltage
• Saturated output power
• Wideband response
• Power gain
• Isolation
: V
CC
= 4.5 to 5.5 V
: P
O(sat)
= +17.5 dBm TYP. @ f = 500 MHz with external inductor
: f
u
= 2.0 GHz TYP. @ 3 dB bandwidth
: G
P
= 23 dB TYP. @ f = 500 MHz
: ISL = 35 dB TYP. @ f = 500 MHz
APPLICATIONS
• PA driver for high frequency system.
ORDERING INFORMATION
Part Number
Package
Marking
Supplying Form
µ
PC1678G
µ
PC1678G -E1
8-pin plastic SOP (225 mil)
1678
Plastic magazine case
Embossed tape 12 mm wide.
1 pin is tape pull-out direction.
Qty 2.5 kp/reel.
Embossed tape 12 mm wide.
1 pin is tape roll-in direction.
Qty 2.5 kp/reel.
µ
PC1678G -E2
Remark
To order evaluation samples, please contact your local NEC sales office.
(Part number for sample order:
µ
PC1678G)
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P11491EJ4V0DS00 (4th edition)
Date Published September 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1996, 1999
µ
PC1678G
PIN CONNECTIONS
Pin No.
(Top Veiw)
Pin Name
INPUT
GND
GND
GND
OUTPUT
GND
GND
V
CC
1
1
2
3
4
8
7
6
5
2
3
4
5
6
7
8
PRODUCT LINE-UP (T
A
= +25 °C, V
CC
= V
out
= 5.0 V, Z
L
= Z
S
= 50
Ω
)
Part Number
f
u
(GHz)
2.0
2.0
P
O(sat)
(dBm)
+17.5
+17.5
G
P
(dB)
23
23
NF (dB)
6.0
6.0
I
CC
(mA)
49
49
Package
8-pin plastic SOP (225 mil)
8-pin plastic SSOP (175 mil)
µ
PC1678G
µ
PC1678GV
Remark
Typical performance. Please refer to
ELECTRICAL CHARACTERISTICS
in detail.
SYSTEM APPLICATION EXAMPLE
RX
÷
N
SW
PLL
TX
PA
driver
µ
PC1678G/GV
2
Data Sheet P11491EJ4V0DS00
µ
PC1678G
PIN EXPLANATION
Applied
Voltage
(V)
–
Pin
No.
1
Pin Name
Function and Applications
Internal Equivalent Circuit
INPUT
Signal input pin. A internal matching
circuit, configured with resisters, enables
50
Ω
connection over a wide band.
A multi-negative feedback circuit is
designed to cancel the deviations of h
FE
and resistance.
This pin must be coupled to signal source
with capacitor for DC cut.
Ground pin. This pin should be
connected to system ground with
minimum inductance. Ground pattern on
the board should be formed as widely as
possible. All the ground pins must be
connected together with wide ground
pattern to decrease impedance
difference.
Signal output pin. The inductor must be
attached between V
CC
and output pins to
supply current to the internal output
transistors.
8 V
CC
5 OUT
2
3
4
6
7
GND
0
IN 1
5
OUTPUT
Voltage
as same
as V
CC
through
external
inductor
4.5 to 5.5
6 7
GND
2
3 4
GND
2, 3, 4, 6 and 7 are shorted by a lead frame.
8
V
CC
Power supply pin, which biases the
internal input transistors.
This pin should be externally equipped
with bypass capacitor to minimize its
impedance.
Data Sheet P11491EJ4V0DS00
3
µ
PC1678G
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Power Dissipation
Symbol
V
CC
P
D
Conditions
T
A
= +25 °C, pin 5 and 8
Mounted on double copper clad 50
×
50
×
1.6 mm
epoxy glass PWB (T
A
= +85 °C)
Rating
6
360
−45
to +85
−55
to +150
T
A
= +25 °C
+10
Unit
V
mW
Operating Ambient Temperature
Storage Temperature
Input Power
T
A
T
stg
P
in
°C
°C
dBm
RECOMMENDED OPERATING RANGE
Parameter
Supply Voltage
Symbol
V
CC
MIN.
4.5
−45
TYP.
5.0
MAX.
5.5
Unit
V
Notice
The same voltage should be applied
to pin 5 and 8
Operating Ambient Temperature
T
A
+25
+85
°C
ELECTRICAL CHARACTERISTICS (T
A
= +25 °C, V
CC
= V
out
= 5.0 V, Z
S
= Z
L
= 50
Ω
)
Parameter
Circuit Current
Power Gain
Noise Figure
Upper Limit Operating Frequency
Isolation
Input Return Loss
Output Return Loss
Saturated Output Power
Symbol
I
CC
G
P
NF
f
u
ISL
RL
in
RL
out
P
O(sat)
No signal
f = 500 MHz
f = 500 MHz
3 dB down below the gain at 0.1 GHz
f = 500 MHz
f = 500 MHz
f = 500 MHz
f = 500 MHz
Conditions
MIN.
40.0
21
−
1.7
30
11
1
+15.5
TYP.
49.0
23
6.0
2.0
35
14
4
+17.5
MAX.
60.0
25
8.0
−
−
−
−
−
Unit
mA
dB
dB
GHz
dB
dB
dB
dBm
4
Data Sheet P11491EJ4V0DS00
µ
PC1678G
TEST CIRCUIT
V
CC
1 800 pF
8
50
Ω
IN
1 800 pF
1
5
L
50
Ω
OUT
1 800 pF
2, 3, 4, 6, 7
L: 20.5 T, 2 mm I.D.,
φ
0.25 UEW
(about 300 nH)
INDUCTOR FOR THE OUTPUT PIN
The internal output transistor of this IC consumes 30 mA, to output medium power. To supply current for output
transistor, connect an inductor between the V
CC
pin (pin 8) and output pin (pin 5).
The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum
voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get
enough gain. In this case, large inductance and Q is suitable.
CAPACITORS FOR THE V
CC
, INPUT AND OUTPUT PINS
Capacitors of 1 800 pF are recommendable as the bypass capacitor for the V
CC
pin and the coupling capacitors
for the input and output pins.
The bypass capacitor connected to the V
CC
pin is used to minimize ground impedance of V
CC
pin. So, stable bias
can be supplied against V
CC
fluctuation.
The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial
impedance. Their capacitance are therefore selected as lower impedance against a 50
Ω
load. The capacitors thus
perform as high pass filters, suppressing low frequencies to DC.
To obtain a flat gain from 100 MHz upwards, 1 800 pF capacitors are used in the test circuit. In the case of under
100 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors
are determined by equation, C = 1/(2
πRfc).
Data Sheet P11491EJ4V0DS00
5
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