MJE13009G
SWITCHMODE Series
NPN Silicon Power
Transistors
The MJE13009G is designed for high−voltage, high−speed power
switching inductive circuits where fall time is critical. They are
particularly suited for 115 and 220 V SWITCHMODE applications
such as Switching Regulators, Inverters, Motor Controls,
Solenoid/Relay drivers and Deflection circuits.
Features
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•
V
CEO(sus)
400 V and 300 V
•
Reverse Bias SOA with Inductive Loads @ T
C
= 100_C
•
Inductive Switching Matrix 3 to 12 Amp, 25 and 100_C t
c
@ 8 A,
100_C is 120 ns (Typ)
•
700 V Blocking Capability
•
SOA and Switching Applications Information
•
These Devices are Pb−Free and are RoHS Compliant*
MAXIMUM RATINGS
Rating
Collector−Emitter Voltage
Collector−Emitter Voltage
Emitter−Base Voltage
Collector Current
Base Current
Emitter Current
−
Continuous
−
Peak (Note 1)
−
Continuous
−
Peak (Note 1)
−
Continuous
−
Peak (Note 1)
Symbol
V
CEO(sus)
V
CEV
V
EBO
I
C
I
CM
I
B
I
BM
I
EM
P
D
P
D
T
J
, T
stg
I
E
Value
400
700
9
12
24
6
12
18
36
2
0.016
100
0.8
−65
to
+150
Unit
Vdc
Vdc
Vdc
Adc
Adc
Adc
W
W/_C
W
W/_C
_C
12 AMPERE
NPN SILICON
POWER TRANSISTOR
400 VOLTS
−
100 WATTS
TO−220AB
CASE 221A−09
STYLE 1
1
2
3
MARKING DIAGRAM
MJE13009G
AY WW
Total Device Dissipation @ T
A
= 25_C
Derate above 25°C
Total Device Dissipation @ T
C
= 25_C
Derate above 25°C
Operating and Storage Junction
Temperature Range
THERMAL CHARACTERISTICS
Characteristics
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Maximum Lead Temperature for Soldering
Purposes 1/8″ from Case for 5 Seconds
Symbol
R
qJA
R
qJC
T
L
Max
62.5
1.25
275
Unit
_C/W
_C/W
_C
Device
A
Y
WW
G
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Package
TO−220
(Pb−Free)
Shipping
50 Units / Rail
MJE13009G
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle
≤
10%.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2011
October, 2011
−
Rev. 10
1
Publication Order Number:
MJE13009/D
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2. Pulse Test: Pulse Width = 300
ms,
Duty Cycle = 2%.
SWITCHING CHARACTERISTICS
DYNAMIC CHARACTERISTICS
ON CHARACTERISTICS
(Note 2)
SECOND BREAKDOWN
OFF CHARACTERISTICS
(Note 2)
ELECTRICAL CHARACTERISTICS
(T
C
= 25_C unless otherwise noted)
Crossover Time
Voltage Storage Time
Inductive Load, Clamped
(Table 1, Figure 13)
Fall Time
Storage Time
Rise Time
Delay Time
Resistive Load
(Table 1)
Output Capacitance
(V
CB
= 10 Vdc, I
E
= 0, f = 0.1 MHz)
Current−Gain
−
Bandwidth Product
(I
C
= 500 mAdc, V
CE
= 10 Vdc, f = 1 MHz)
Base−Emitter Saturation Voltage
(I
C
= 5 Adc, I
B
= 1 Adc)
(I
C
= 8 Adc, I
B
= 1.6 Adc)
(I
C
= 8 Adc, I
B
= 1.6 Adc, T
C
= 100_C)
Collector−Emitter Saturation Voltage
(I
C
= 5 Adc, I
B
= 1 Adc)
(I
C
= 8 Adc, I
B
= 1.6 Adc)
(I
C
= 12 Adc, I
B
= 3 Adc)
(I
C
= 8 Adc, I
B
= 1.6 Adc, T
C
= 100_C)
DC Current Gain
(I
C
= 5 Adc, V
CE
= 5 Vdc)
(I
C
= 8 Adc, V
CE
= 5 Vdc)
Second Breakdown Collector Current with base forward biased
Clamped Inductive SOA with Base Reverse Biased
Emitter Cutoff Current
(V
EB
= 9 Vdc, I
C
= 0)
Collector Cutoff Current
(V
CEV
= Rated Value, V
BE(off)
= 1.5 Vdc)
(V
CEV
= Rated Value, V
BE(off)
= 1.5 Vdc, T
C
= 100_C)
Collector−Emitter Sustaining Voltage
(I
C
= 10 mA, I
B
= 0)
(V
CC
= 125 Vdc, I
C
= 8 A,
I
B1
= I
B2
= 1.6 A, t
p
= 25
ms,
Duty Cycle
v
1%)
(I
C
= 8 A, V
clamp
= 300 Vdc,
I
B1
= 1.6 A, V
BE(off)
= 5 Vdc, T
C
= 100_C)
Characteristic
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MJE13009G
2
V
CEO(sus)
Symbol
V
CE(sat)
V
BE(sat)
I
EBO
I
CEV
C
ob
h
FE
I
S/b
−
t
sv
f
T
t
d
t
s
t
r
t
f
t
c
Min
400
−
−
−
−
−
−
−
4
−
−
−
−
−
−
−
8
6
−
−
−
0.12
0.92
0.45
0.06
Typ
180
0.2
1.3
−
−
−
−
−
−
−
−
−
−
−
−
−
−
See Figure 1
See Figure 2
Max
0.7
2.3
0.7
0.1
1.2
1.6
1.5
40
30
3
1
−
−
1
1
5
−
1
1.5
3
2
mAdc
mAdc
MHz
Unit
Vdc
Vdc
Vdc
pF
ms
ms
ms
ms
ms
ms
MJE13009G
100
50
IC, COLLECTOR CURRENT (AMP)
20
10
5
2
1
0.5
0.2
0.1
0.05
0.02
0.01
5
7
T
C
= 25°C
dc
100
m
σ
14
10
m
σ
12
IC, COLLECTOR (AMP)
10
8
6
4
2
0
10
50 70 100
20 30
200 300
V
CE
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
500
0
100
200
300
3V
1.5
400 V 500
600
700
800
V
BE(off)
= 9 V
5V
T
C
≤
100°C
I
B1
= 2.5 A
1 m
s
THERMAL LIMIT
BONDING WIRE LIMIT
SECOND BREAKDOWN LIM
CURVES APPLY BELOW RATED
IT
V
CEO
V
CEV
, COLLECTOR-EMITTER CLAMP VOLTAGE (VOLTS)
Figure 1. Forward Bias Safe Operating Area
Figure 2. Reverse Bias Switching Safe
Operating Area
The Safe Operating Area figures shown in Figures 1 and 2 are specified ratings for these devices under the test conditions shown.
1
SECOND BREAK
DOWN DERATING
POWER DERATING FACTOR
0.8
0.6
THERMAL
DERATING
0.4
0.2
0
20
40
60
80
100
120
140
160
T
C
, CASE TEMPERATURE (°C)
Figure 3. Forward Bias Power Derating
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
−
V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 1 is based on T
C
= 25_C; T
J(pk)
is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated when T
C
≥
25_C. Second breakdown limitations do
not derate the same as thermal limitations. Allowable
current at the voltages shown on Figure 1 may be found at
any case temperature by using the appropriate curve on
Figure 3.
T
J(pk)
may be calculated from the data in Figure 4. At high
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations
imposed by second breakdown. Use of reverse biased safe
operating area data (Figure 2) is discussed in the applications
information section.
r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)
1
0.7
0.5
0.3
0.2
D = 0.5
0.2
0.1
0.1
0.07
0.05
0.03
0.02
0.01
0.01
0.01
SINGLE PULSE
0.02
0.05
0.1
0.2
0.5
1
2
0.05
0.02
Z
qJC(t)
= r(t) R
qJC
R
qJC
= 1.25°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
- T
C
= P
(pk)
Z
qJC(t)
5
10
20
50
P
(pk)
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
100
200
500
1.0 k
t, TIME (ms)
Figure 4. Typical Thermal Response [Z
qJC
(t)]
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3
MJE13009G
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
50
2
1.6
I
C
= 1 A
1.2
3A
5A
8A
12 A
hFE , DC CURRENT GAIN
30
20
25°C
T
J
= 150°C
0.8
10
7
5
0.2
0.3
-
55°C
V
CE
= 5 V
3
0.5 0.7 1
5
7
2
I
C
, COLLECTOR CURRENT (AMP)
10
20
0.4
T
J
= 25°C
0
0.05 0.07 0.1
0.2 0.3
0.5 0.7 1
I
B
, BASE CURRENT (AMP)
2
3
5
Figure 5. DC Current Gain
Figure 6. Collector Saturation Region
1.4
0.7
0.6
I
C
/I
B
= 3
1.2
V, VOLTAGE (VOLTS)
I
C
/I
B
= 3
T
J
= - 55°C
V, VOLTAGE (VOLTS)
0.5
0.4
0.3
0.2
0.1
T
J
= 150°C
1
- 55°C
0.8
25°C
0.6
0.4
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
I
C
, COLLECTOR CURRENT (AMP)
150°C
25°C
0
0.2 0.3
0.5 0.7
1
2
3
5
7
10
20
I
C
, COLLECTOR CURRENT (AMP)
Figure 7. Base−Emitter Saturation Voltage
Figure 8. Collector−Emitter Saturation
Voltage
10K
V
CE
= 250 V
IC, COLLECTOR CURRENT (
μ
A)
1K
T
J
= 150°C
125°C
100°C
10
75°C
50°C
1
25°C
0.1
- 0.4
REVERSE
FORWARD
+ 0.2
+ 0.4
0
- 0.2
V
BE
, BASE-EMITTER VOLTAGE (VOLTS)
+ 0.6
C, CAPACITANCE (pF)
4K
2K
1K
800
600
400
200
100
80
60
40
C
ob
C
ib
T
J
= 25°C
100
0.1
100
0.2 0.5 1 2 5 10 20 50
V
R
, REVERSE VOLTAGE (VOLTS)
200
500
Figure 9. Collector Cutoff Region
Figure 10. Capacitance
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4
MJE13009G
Table 1. Test Conditions for Dynamic Performance
REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING
+5 V
1N4933
0.001
mF
TEST CIRCUITS
5V
P
W
DUTY CYCLE
≤
10%
t
r
, t
f
≤
10 ns
68
2N2222
1
k
1
+ 5 Vk
1k
2N2905
NOTE
PW and V
CC
Adjusted for Desired I
C
R
B
Adjusted for Desired I
B1
RESISTIVE
SWITCHING
33
MJE210
V
CC
+125 V
L
MR826*
R
C
R
B
I
B
D.U.T.
MJE200
- 4.0
V
I
C
V
clamp
*SELECTED FOR
≥
1 kV
5.1 k
V
CE
51
TUT
R
B
SCOPE
33 1N4933
D1
1N4933
0.02
mF
270
47 100
1/2 W
- V
BE(off)
V
CC
= 125 V
R
C
= 15
W
D1 = 1N5820 or Equiv.
R
B
=
W
+10 V
25
ms
CIRCUIT
VALUES
Coil Data:
Ferroxcube Core #6656
Full Bobbin (~16 Turns) #16
GAP for 200
mH/20
A
L
coil
= 200
mH
OUTPUT WAVEFORMS
V
CC
= 20 V
V
clamp
= 300 Vdc
TEST WAVEFORMS
I
C
I
CM
t
f
CLAMPED
t
f
UNCLAMPED
≈
t
2
t
t
1
t
f
V
clamp
t
2
t
1
ADJUSTED TO
OBTAIN I
C
t
1
≈
t
2
≈
L
coil
(I
CM
)
V
CC
L
coil
(I
CM
)
V
clamp
V
CE
V
CEM
TIME
Test Equipment
Scope−Tektronics
475 or Equivalent
0
-8 V
t
r
, t
f
< 10 ns
Duty Cycle = 1.0%
R
B
and R
C
adjusted
for desired I
B
and I
C
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