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DATA SHEET

MOS INTEGRATED CIRCUITS

µ

PD78F4938A

16-BIT SINGLE-CHIP MICROCONTROLLER

DESCRIPTION

The

µ

PD78F4938A is a product in the

µ

PD784938A Subseries in the 78K/IV Series.

The

µ

PD78F4938A has flash memory in place of the internal ROM of the

µ

PD784938A. The flash memory

incorporated enables program writing or erasing with the microcontroller mounted on the target board.

Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before

designing.

µ

PD784938A Subseries User’s Manual Hardware: U13570E

78K/IV Series User’s Manual Instructions:

U10905E

FEATURES

•

Pin-compatible with mask ROM version (except V

PP

pin)

•

Flash memory: 256 KB

•

Internal RAM: 10496 bytes

4 channels

•

Serial interface:

• UART/IOE (3-wire serial I/O): 2 channels (on-chip baud rate generator)

• CSI (3-wire serial I/O):

2 channels

•

On-chip IEBus

TM

controller

•

Supply voltage: V

DD

= 4.0 to 5.5 V (@12.58 MHz operation)

V

DD

= 3.0 to 5.5 V (@6.29 MHz operation)

APPLICATION

Car audio, etc.

ORDERING INFORMATION

Part Number

Package

100-pin plastic QFP (14

×

20)

Internal ROM

256 KB

Internal RAM

10496 bytes

µ

PD78F4938AGF-3BA

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. U14118EJ1V0DS00

Date Published March 2001 N CP(K)

Printed in Japan

©

2001

1999, 2001

µ

PD78F4938A

78K/IV SERIES LINEUP

: Products in mass-production

: Products under development

Supports I

2

C bus

Supports multimaster I

2

C bus

µ

PD784038Y

µ

PD784038

µ

PD784225Y

µ

PD784225

80-pin, ROM correction added

Supports multimaster I

2

C bus

Standard models

µ

PD784026

Enhanced

A/D converter,

16-bit timer, and

power management

Enhanced internal memory capacity

Pin-compatible with the

µ

PD784026

Supports multimaster I

2

C bus

µ

PD784216AY

µ

PD784216A

100-pin, enhanced I/O and

internal memory capacity

µ

PD784218AY

µ

PD784218A

Enhanced internal memory

capacity, ROM correction added

µ

PD784054

µ

PD784046

ASSP models

µ

PD784956A

For DC inverter control

On-chip 10-bit A/D converter

µ

PD784967

Enhanced functions of the

µ

PD784938A, enhanced I/O

and internal memory capacity.

Enhanced peripheral functions

µ

PD784938A

Enhanced functions of the

µ

PD784908, enhanced

internal memory capacity,

ROM correction added.

Supports multimaster I

2

C bus

µ

PD784908

On-chip IEBus

TM

controller

µ

PD784928Y

µ

PD784915

Software servo control

On-chip analog circuit for VCRs

Enhanced timer

µ

PD784928

Enhanced functions

of the

µ

PD784915

µ

PD784976A

On-chip VFD controller/driver

Remark

Although VFD (Vacuum Florescent Display is generally used, in some documents, the display is described

as FIP

TM

(Florescent Inidicator Panel). VFD and FIP are functionally equivalent.

2

Data Sheet U14118EJ1V0DS

µ

PD78F4938A

OVERVIEW OF FUNCTIONS

(1/2)

Part Number

Item

Number of basic instructions (mnemonics) 113

General-purpose registers

Minimum instruction execution time

8 bits

×

32 registers

×

8 banks, or 16 bits

×

8 registers

×

8 banks (memory map)

320 ns/636 ns/1.27

µ

s/2.54

µ

s (@6.29 MHz operation)

160 ns/320 ns/636 ns/1.27

µ

s (@12.58 MHz operation)

256 KB

10496 bytes

1 MB with program and data spaces combined

Total

Input

I/O

Pins with

ancillary

function

Note

LED direct drive output

Transistor direct drive

N-ch open drain drive

80 pins

8 pins

72 pins

24 pins

8 pins

4 pins

4 bits

×

2, or 8 bits

×

1

Internal (simple version)

Timer/event counter 0: Timer counter

×

1

(16 bits)

Capture register

×

1

Compare register

×

2

Timer/event counter 1: Timer counter

×

1

(16 bits)

Capture register

×

1

Capture/compare register

×

1

Compare register

×

1

Timer/event counter 2: Timer counter

×

1

(16 bits)

Capture register

×

1

Capture/compare register

×

1

Compare register

×

1

Timer 3 (16 bits):

Timer counter

×

1

Compare register

×

1

Pulse output possible

• Toggle output

• PWM/PPG output

Pulse output possible

• Toggle output

• PWM/PPG output

• One-shot pulse output

Real-time output port

µ

PD78F4938A

Internal memory

ROM

RAM

Memory space

I/O port

Real-time output port

IEBus controller

Timer/counter

Watch timer

Generates interrupt request at 0.5-second intervals (On-chip watch clock oscillator)

Main clock (12.58 MHz) or watch clock (32.7 kHz) selectable as input clock

Selectable from f

CLK

, f

CLK

/2, f

CLK

/4, f

CLK

/8, or f

CLK

/16 (also usable as 1-bit output port)

12-bit resolution

×

2 channels

UART/IOE (3-wire serial I/O): 2 channels (on-chip baud rate generator)

CSI (3-wire serial I/O):

2 channels

8-bit resolution

×

8 channels

1 channel

Internal (4 points of correction addresses can be set.)

Provided (up to 1 MB)

Clock output

PWM output

Serial interface

A/D converter

Watchdog timer

ROM correction function

External expansion function

Note

Pins with ancillary functions are included in the I/O pins.

Data Sheet U14118EJ1V0DS

3

µ

PD78F4938A

(2/2)

Part Number

Item

Standby

Interrupt

Hardware source

Software source

Non-maskable

Maskable

HALT/STOP/IDLE mode

27 (internal: 20, external: 7 (sampling clock variable input: 1))

BRK instruction, BRKCS instruction, operand error

Internal: 1, external: 1

Internal: 19, external: 6

Four programmable priority levels

Three types of processing formats: Vectored interrupt/macro service/context switching

Supply voltage

• V

DD

= 4.0 to 5.5 V (@12.58 MHz operation)

• V

DD

= 3.0 to 5.5 V (@6.29 MHz operation)

100-pin plastic QFP (14

×

20)

µ

PD78F4938A

Package

4

Data Sheet U14118EJ1V0DS

µ

PD78F4938A

CONTENTS

1. DIFFERENCES AMONG PRODUCTS IN

µ

PD784938A SUBSERIES ...................................

2. PIN CONFIGURATION (TOP VIEW) ...........................................................................................

3. BLOCK DIAGRAM .........................................................................................................................

4. PIN

4.1

4.2

4.3

FUNCTIONS ............................................................................................................................

Port Pins .................................................................................................................................

Non-Port Pins ........................................................................................................................

Pin I/O Circuits and Recommended Connection of Unused Pins .................................

6

7

9

10

12

14

5. INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS) .................................................. 18

6. PROGRAMMING FLASH MEMORY ............................................................................................

6.1 Selecting Communication Mode .........................................................................................

6.2 Flash Memory Programming Functions ............................................................................

6.3 Connecting Flashpro III ........................................................................................................

19

20

21

7. ELECTRICAL SPECIFICATIONS .................................................................................................. 22

8. PACKAGE DRAWING .................................................................................................................... 42

9. RECOMMENDED SOLDERING CONDITIONS ........................................................................... 43

APPENDIX A. DEVELOPMENT TOOLS ............................................................................................ 44

APPENDIX B. RELATED DOCUMENTS ........................................................................................... 47

Data Sheet U14118EJ1V0DS

5

UPD78F4937GF-3BA

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