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74LVC1G32GM-Q100

产品描述OR Gate
产品类别逻辑    逻辑   
文件大小204KB,共12页
制造商Nexperia
官网地址https://www.nexperia.com
标准
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74LVC1G32GM-Q100概述

OR Gate

74LVC1G32GM-Q100规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Nexperia
Reach Compliance Codecompliant
JESD-609代码e4
逻辑集成电路类型OR GATE
湿度敏感等级1
峰值回流温度(摄氏度)260
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
处于峰值回流温度下的最长时间30

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74LVC1G32-Q100
Single 2-input OR gate
Rev. 4 — 25 January 2019
Product data sheet
1. General description
The 74LVC1G32-Q100 provides one 2-input OR function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices
as translators in mixed 3.3 V and 5 V applications.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry
disables the output, preventing the damaging backflow current through the device when it is
powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
±24 mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LVC1G32GW-Q100
74LVC1G32GV-Q100
74LVC1G32GM-Q100
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
Name
TSSOP5
SC-74A
XSON6
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
Version
SOT353-1
SOT753
SOT886

74LVC1G32GM-Q100相似产品对比

74LVC1G32GM-Q100 74LVC1G32GW-Q100,125 74LVC1G32GW-Q100/H
描述 OR Gate OR Gate, LVC/LCX/Z Series, 1-Func, 2-Input, CMOS, PDSO5 74LVC1G32-Q100 - Single 2-input OR gate TSSOP 5-Pin
厂商名称 Nexperia Nexperia Nexperia
Reach Compliance Code compliant compliant compliant
是否Rohs认证 符合 符合 -
JESD-609代码 e4 e3 -
逻辑集成电路类型 OR GATE OR GATE -
湿度敏感等级 1 1 -
端子面层 Nickel/Palladium/Gold (Ni/Pd/Au) Tin (Sn) -

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