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SNJ54ALS190FK

产品描述Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, CQCC20, CERAMIC, CC-20
产品类别逻辑    逻辑   
文件大小140KB,共8页
制造商Rochester Electronics
官网地址https://www.rocelec.com/
下载文档 详细参数 选型对比 全文预览

SNJ54ALS190FK概述

Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, CQCC20, CERAMIC, CC-20

SNJ54ALS190FK规格参数

参数名称属性值
厂商名称Rochester Electronics
包装说明QCCN,
Reach Compliance Codeunknown
其他特性TCO OUTPUT
计数方向BIDIRECTIONAL
系列ALS
JESD-30 代码S-CQCC-N20
长度8.89 mm
负载/预设输入YES
逻辑集成电路类型DECADE COUNTER
工作模式SYNCHRONOUS
位数4
功能数量1
端子数量20
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码QCCN
封装形状SQUARE
封装形式CHIP CARRIER
传播延迟(tpd)26 ns
座面最大高度2.03 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术TTL
温度等级MILITARY
端子形式NO LEAD
端子节距1.27 mm
端子位置QUAD
触发器类型POSITIVE EDGE
宽度8.89 mm
最小 fmax20 MHz

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SN54ALS190, SN54ALS191, SN74ALS190, SN74ALS191
SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS
SDAS210 – D2661, DECEMBER 1982 – REVISED MAY 1986
Single Down/Up Count Control Line
Look-Ahead Circuitry Enhances Speed of
Cascaded Counters
Fully Synchronous in Count Modes
Asynchronously Presettable With Load
Control
Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
Dependable Texas Instruments Quality and
Reliability
SN54ALS190, SN54ALS191 . . . J PACKAGE
SN74ALS190, SN74ALS191 . . . D OR N PACKAGE
(TOP VIEW)
B
Q
B
Q
A
CTEN
D/U
Q
C
Q
D
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
A
CLK
RCO
MAX/MIN
LOAD
C
D
description
SN54ALS190, SN54ALS191 . . . FK PACKAGE
(TOP VIEW)
The ’ALS190 and ’ALS191 are synchronous,
reversible up/down counters. The ’ALSL90 is a
4-bit decade counter and the ’ALS191 is a 4-bit
binary counter. Synchronous counting operation
3 2 1 20 19
Q
A
is provided by having all flip-flops clocked
18
CLK
4
simultaneously so that the outputs change
CTEN
17
RCO
5
coincident with each other when so instructed by
NC
16
NC
6
the steering logic. This mode of operation
D/U
15
MAX/MIN
7
eliminates the output counting spikes normally
14
LOAD
Q
C
8
9 10 11 12 13
associated with asynchronous (ripple clock)
counters.
The outputs of the four flip-flops are triggered on
a low-to-high-level transition of the clock input if
NC–No internal connection
the enable input CTEN is low. A high at CTEN
inhibits counting. The direction of the count is
determined by the level of the down/up D/U input.
When D/U is low, the counter counts up and when
D/U is high, it counts down.
These counters feature a fully independent clock circuit. Changes at the control inputs (CTEN and D/U) that will
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of
the counter will be dictated solely by the condition meeting the stable setup and hold times.
These counters are fully programmable; that is, the outputs may each be preset to either level by placing a low
on the load input and entering the desired data at the data inputs. The output will change to agree with the data
inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-N
dividers by simply modifying the count length with the preset inputs.
The CLK, D/U, and LOAD inputs are buffered to lower the drive requirement, which significantly reduces the
loading on, or current required by, clock drivers, etc., for long parallel words.
Two outputs have been made available to perform the cascading function: ripple clock and maximum/minimum
count. The latter output produces a high-level output pulse with a duration approximately equal to one complete
cycle of the clock while the count is zero (all outputs low) counting down or maximum (9 or 15) counting up. The
ripple clock output produces a low-level output pulse under those same conditions but only while the clock input
is low. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the
succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The
maximum/minimum count output can be used to accomplish look-ahead for high-speed operation.
The SN54ALS190 and SN54ALS191 are characterized for operation over the full military temperature range
of – 55°C to 125°C. The SN74ALS190 and SN74ALS191 are characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1986, Texas Instruments Incorporated
5BASIC
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
QD
GND
NC
D
C
QB
B
NC
VCC
A
1

SNJ54ALS190FK相似产品对比

SNJ54ALS190FK SN54ALS190J SN54ALS190FK
描述 Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, CQCC20, CERAMIC, CC-20 Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, CDIP16, 0.300 INCH, CERAMIC, DIP-16 Decade Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, CQCC20, CERAMIC, CC-20
包装说明 QCCN, DIP, QCCN,
Reach Compliance Code unknown unknown unknown
其他特性 TCO OUTPUT TCO OUTPUT TCO OUTPUT
计数方向 BIDIRECTIONAL BIDIRECTIONAL BIDIRECTIONAL
系列 ALS ALS ALS
JESD-30 代码 S-CQCC-N20 R-GDIP-T16 S-CQCC-N20
长度 8.89 mm 19.56 mm 8.89 mm
负载/预设输入 YES YES YES
逻辑集成电路类型 DECADE COUNTER DECADE COUNTER DECADE COUNTER
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
位数 4 4 4
功能数量 1 1 1
端子数量 20 16 20
最高工作温度 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED
封装代码 QCCN DIP QCCN
封装形状 SQUARE RECTANGULAR SQUARE
封装形式 CHIP CARRIER IN-LINE CHIP CARRIER
传播延迟(tpd) 26 ns 26 ns 26 ns
座面最大高度 2.03 mm 5.08 mm 2.03 mm
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V
表面贴装 YES NO YES
技术 TTL TTL TTL
温度等级 MILITARY MILITARY MILITARY
端子形式 NO LEAD THROUGH-HOLE NO LEAD
端子节距 1.27 mm 2.54 mm 1.27 mm
端子位置 QUAD DUAL QUAD
触发器类型 POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
宽度 8.89 mm 7.62 mm 8.89 mm
最小 fmax 20 MHz 20 MHz 20 MHz
Base Number Matches - 1 1
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