PS2Adapt
TM
UR6HCPS2-SP40
Converts PS/2 Data to Serial or SPI
HID & SYSTEM MANAGEMENT PRODUCTS, PROTOCOL INTERPRETER FAMILY
DESCRIPTION
The PS2Adapt
TM
is a Zero-Power
TM
protocol interpreter that can link an
AT/PS/2-compatible Human Input
Device (HID), such as a keyboard,
mouse, bar-code reader, etc. to any
host system equipped with either
Asynchronous Serial Interface (ASI)
or the Serial Peripheral Interface
(SPI).
The IC was designed specifically
for RISC-based portable devices
that are limited to ASI and SPI
interfaces. The PS2Adapt
TM
allows
designers to easily connect PS/2
devices to their system.
The UR6HCPS2-SP40 emulates all
the functions of the 8042 keyboard
controller which typically resides on
the AT/PS/2 motherboard. The
Zero-Power
TM
PS2Adapt
TM
will power
down even between
key presses and bewteen mouse
reports. Typical power
consumption is only 1 µA operating
between 3-5 Volts.
The UR6HCPS2-SP40 boasts 4
external PS/2 ports that support the
hot-plug connection of an external
PS/2 keyboard or mouse,
including MouseWheel, 5-button
mice and touch screens in absolute
mode.
Each of four external PS/2 ports
also support more than 140 key
scan codes including international
language keys, internet keys, and
power keys. The PS2Adapt
TM
also
offers 4 reserved pins for LED
functions, their functions can be
customized by Semtech.
FEATURES
• Typically consumes less than 1 µA
• Interfaces the host system via
either Asynchronous Serial
Interface or Serial Peripheral
Interface (SPI)
• Jumper selectable interface and
Baud rate
• Offers four PS/2 ports for the hot-
plug connection of external
keyboards or mice including
MouseWheel, 5 button mice and
absolute mode touch screens
APPLICATIONS
• H/PCs
• Web Phones
PIN ASSIGNMENTS
• PDAs
• System Legacy Support
• Easy to use, one way
communication protocol
• Operating voltage between 3
and 5 Volts
• Custom versions available in
small or large quantities
• Small 7x7 mm package to
accommodate slim designs
24
25
E3DATA
RxD
TxD
SCLK
SDATA
_PWR_OFF
_CTS/_ATN
CONF0
E1DATA
E1CLK
E0DATA
E0CLK
_RTS/_SS
E3CLK
E2DATA
E2CLK
17
16
RES0
LED0
LED1
UR6HCPS2-SP40-FG
LQFP
LED2
LED3
VSS
_OSCOUT
OSCIN
32
1
VREF
X_PWR
ASI/_SPI_SEL
CONF2
VDD
VSS2
_RESET
CONF1
9
8
PS2Adapt is a trademark of Semtech Corp. All
other trademarks belong to their respective
companies.
Copyright Semtech, 2000-2001
DOC6-PS2-SP40-DS-102
1
www.semtech.com
ORDERING CODE
Package options
32-pin Plastic LQFP
Other materials
PS2Adapt
TM
Evaluation Kit
Pitch In mm’s
0.8 mm
Part number
EVK6-PS2-SP40-100
TA = -40°C to +85°C
UR6HCPS2-SP40-FG
FUNCTIONAL DIAGRAM
ASI/_SPI_SEL
SDATA
SCLK
RxD
TxD
SS/RTS
ATN/CTS
External
PS/2 Port 0
Dual Mode
Serial
Communications
Port
HID Manager
E0CLK
E0DATA
External
PS/2 Port 1
E1CLK
E1DATA
External
PS/2 Port 2
E2CLK
E2DATA
PWR_OFF
Power
Management
Unit
External
PS/2 Port 3
E3CLK
E3DATA
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
2
www.semtech.com
FUNCTIONAL DESCRIPTION
The PS2Adapt
TM
consists
functionally of three major sections.
These are the Dual Mode Serial
Communications Interface, the
Power Management Unit, and the
HID Manager. All sections
communicate with each other and
operate concurrently.
HID MANAGER
The UR6HCPS2-SP40 Human Input
Device (HID) Manager is
responsible for the configuration
and handling of HID devices that
are attached to the controller
through the four external PS/2 ports.
The HID Manager has the following
responsibilities:
1. Initialize PS/2 keyboards and
mice
2. Mix the information from external
PS/2 devices
3. Formatting and relaying reports of
the HID devices to the Host.
OPERATIONS BELOW 5 V
The standard PS/2 devices are
specified for supply voltage of 5V.
Operations of the UR6PS2-SP40 at
a lower voltage (3V) are only
possible if the HID devices
connected to ALL external PS/2
ports are capable of 3V operations.
PIN DEFINITIONS
Pin Numbers
Mnemonic
Power Supply
VDD
VREF
VSS
VSS2
_RESET
LQFP
8
5
11
7
6
Type
PWR
AI
PWR
PWR
I
Name and Function
Positive Supply Voltage:
+3V-+5V
Positive Analog Ref Voltage
Ground:
analog signal
Ground:
negative supply voltage
Hardware Reset Pin:
at Low-level, this pin holds the
UR6HCPS2-SP40 in a reset state.
Oscillator input:
connect ceramic
resonator with built-in load capacitors
or CMOS clock from external oscillator
4 MHz operating frequency
Oscillator Output:
connect ceramic
resonator with built-in load capacitors
or keep open if external oscillator
is used
PS/2
PS/2
PS/2
PS/2
PS/2
PS/2
PS/2
PS/2
Clock:
for External Device 0
Data:
for External Device 0
Clock:
for External Device 1
Data:
for External Device 1
Clock:
for External Device 2
Data:
for External Device 2
Clock:
for External Device 3
Data:
for External Device 3
Oscillator Pins
OSCIN
9
I
_OSCOUT
10
O
PS/2 Ports
E0CLK
E0DATA
E1CLK
E1DATA
E2CLK
E2DATA
E3CLK
E3DATA
System Status
Monitoring
_PWR_OFF
18
19
20
21
22
23
24
25
I/nD
I/nD
I/nD
I/nD
I/nD
I/nD
I/nD
I/nD
30
I±Int
X_PWR
Communication
Interface
_SS/_RTS
4
AI
Power Off Signal:
capable of
Interrupt on both Positive and Negative
edges
External PS/2 Device Power
Detector
17
I_Int
_ATN/_CTS
31
O
TXD
RXD
SDATA
SCLK
27
26
29
28
O
I
I
Ready_To_Send:
Active-Low
signal Input.Low-level indicates that
the Host System is ready to send
data from UR6HCPS2-SP40.
Attention (SPI Mode) or
Clear_To_Send (Asynchronous
Serial Mode ):
Active-Low signal
Output. Low-level indicates that the
UR6HCPS2-SP40 has data to send to
the Host System
Transmit Data (Asynchronous
Serial Mode):
Idle = "High" = 1
Receive Data (Asynchronous
Serial Mode):
Reserved future use
Master-In-Slave-Out (SPI Mode):
keep open for ASI mode or tie to Gnd
Serial Clock (SPI Mode):
in SPI
Mode, use the following Clock
sequence:Idle-high/ Negative-Edge
(Shift Data) \ Positive-Edge (Latch
Data), Idle-High. Keep open or tie to
Gnd for ASI mode
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
3
www.semtech.com
PIN DEFINITIONS, (CON’T)
Pin Numbers
Mnemonic
Configuration Pins
CONF0
CONF1
CONF2
ASI/_SPI_SEL
Reserved for
LED0
LED1
LED2
LED3
RES0
LQFP
32
1
2
3
Type
I
I
I
I
Name and Function
Configuration pin 0; see Note 2
Configuration pin 1; see Note 2
Configuration pin 2; see Note 2
SPI/Serial Selector pin. High:Serial;
12
13
14
15
16
I/O
I/O
I/O
I/O
I/O
Reserved
Reserved
Reserved
Reserved
Reserved
LED Driver
LED Driver
LED Driver
LED Driver
GPIO
/
/
/
/
GPIO
GPIO
GPIO
GPIO
Note 1:
An underscore in front of the pin mnemonic denotes an active low signal.
Note 2:
When Asynchronous Serial Interface (ASI) mode is selected, ASI/_SPI_SEL pin is
high and pins CONF2:CONF1:CONF0 select the following Baud Rates:
111: 19200 bps; 110: 9600 bps; 101: 1200 bps; 100: 600 bps; 011: 300 bps
010: 31250 bps; 001: 62500 bps.
When SPI mode is selected, ASI/_SPI_SEL pin is low. If CONF0 is high, the trasnfer sequence
is MSB to LSB, otherwise, LSB to MSB.
Note 3:
For ASI/_SPI_SEL pin use the following setting:
1: Asynchronous Serial Mode; 0: Serial Peripheral Interface (SPI) mode
Note 4:
In ASI mode, SDATA and SCLK are driven to low after reset. In SPI mode, TXD, RXD,
CONF1 and CONF2 are driven to low after reset. In both ASI and SPI mode, LED0, LED1,
LED2, LED3 and RES0 are configured as inputs with pull-up resistors.
Pin Types Legend:
AI=Analog Input; I=Input; O=Output; I/O=Input or Output;
I/nD=Input or Output with N-channel Open Drain driver;
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
4
www.semtech.com
COMMUNICATIONS INTERFACE FOR THE UR6HCPS2-SP40
The UR6HCPS2-SP40 offers two
modes of serial communications:
"Synchronous Peripheral Interface"
(SPI) mode and the "Asynchronous
Serial Interface" (ASI) mode.
The IC determines the mode of
communication with the Host during
power-up by reading the value of
the ASI/_SPI_SEL pin. If the pin is
tied high, the ASI mode is enabled.
If it is low, the SPI interface is
enabled.
The PS2Adapt
TM
implements the SPI
mode by single direction
communication that supports bit
rates up to 250 Kb/s. Several Hosts
and companion chips implement
the SPI protocol in order to
communicate with a wide range of
peripherals such as EEPROMs, A/D
converters, MCUs and other system
components.
The UR6HCPS2-SP40 deploys the
_ATN as an additional hand-shake
signal in order to support low power
operation of the bus.
The PS2Adapt
TM
implements the ASI
mode at fixed preselected baud
rates: 300bps, 600bps, 1200bps,
9600bps, 19200bps, 31250bps and
62500bps, depending on the
Configuration pins’ state on power
up.
In ASI mode, the UR6HCPS2-SP40
deploys the _RTS & _CTS as
additional hand-shake signals in
order to support low power
operation of the bus.
HOST
_CTS
_RTS
RxD
TxD
_CTS
_RTS
RxD
TxD
The diagrams below illustrate the SPI and ASI communications interfaces,
respectively.
SPI Communications Interface
MOSI
MISO
SCLK
_ATN
_SS2
PS2Adapt
TM
(slave)
SDATA
Host
(master)
_SS1
Slave 2
ASI Communications Interface
UR6HCPS2-SP40
Copyright Semtech, 2002-2001
DOC6-PS2-SP40-DS-102
5
www.semtech.com
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