US1050-33
5A LOW DROPOUT POSITIVE
FIXED 3.3V OUTPUT REGULATOR
FEATURES
Guaranteed < 1.3V Dropout at Full Load
Current
Fast Transient Response
1% Voltage Reference Initial Accuracy
Output Current Limiting
Built-in Thermal Shutdown
DESCRIPTION
The US1050-33 product is a low dropout three terminal
fixed 3.3V output regulator with minimum of 5A output
current capability. This product is specifically designed
to provide well regulated supply for low voltage IC appli-
cations requiring 3.3V output. The US 1050-33 is
guar-
anteed to have <1.3V drop out at full load current
making it ideal to provide well regulated output with sup-
ply voltage as low as 4.6V input.
APPLICATIONS
Standard 3.3V Chip-Set and Logic Applications
TYPICAL APPLICATION
5V
C1
330uF
Vin
3
US1050-33
Vout
Gnd
2
3.3V / 5A
C2
330uF
1
1050-33app1-1.1
Typical application of US1050-33
Tj (°C)
0 TO 150
3 PIN PLASTIC
TO220 (T)
US1050-33CT
3 PIN PLASTIC
TO263 (M)
US1050-33CM
2 PIN PLASTIC
POWER FLEX (P)
US1050-33CP
3 PIN PLASTIC
TO252 (D)
US1050-33CD
Rev. 1.1
10/27/00
2-33
US1050-33
ABSOLUTE MAXIMUM RATINGS
Input Voltage (Vin) .................................................................. 7V
Power Dissipation ............................................ Internally Limited
Storage Temperature Range .............................. -65
°
C TO 150
°
C
Operating Junction Temperature Range .................. 0
°
C TO 150
°
C
PACKAGE INFORMATION
3 PIN PLASTIC TO220 ( T )
FRONT VIEW
3
3 PIN PLASTIC TO263 ( M )
FRONT VIEW
3
2 PIN PLASTIC POWER FLEX ( P ) 3 PIN PLASTIC TO252 ( D )
FRONT VIEW
FRONT VIEW
3
Vin
Vout
Gnd
Vin
Vout
Gnd
Tab is
Vout
4
Vin
Tab is
Vout
4
3
Vin
Tab is
Vout
2
Tab is
Vout
2
1
1
1
Adj
1
Gnd
θ
JT
=2.7°C/W
θ
JA
=60°C/W
θ
JA
=35°C/W for 1" Square pad
θ
JA
=70°C/W for 1" Square pad
θ
JA
=70°C/W for 0.5" Sq pad
Unless otherwise specified ,these specifications apply over ,Cin=1uF,Cout=10uF,and Tj=0 to 150
°
C.Typical
values refer to Tj=25
°
C.
PARAMETER
Output Voltage
Line Regulation
Load Regulation (note 1)
Dropout Voltage
(note 2)
Current Limit
Minimum Load Current
(note 3)
Thermal Regulation
Ripple Rejection
Adjust Pin Current Change
Temperature Stability
Long Term Stability
RMS Output Noise
SYM
V
o
TEST CONDITION
Io=10mA,Tj=25
°
C,Vin=5V
Io=10mA, Vin=5V
Io=10mA,4.7V<Vin<7V
Vin=5V,Vadj=0,10mA<Io<5A
Note 2 , Io=5A
Vin=5V,dVo=100mV
Vin=5V
30 mS PULSE,Vin-Vo=3V,Io=5A
f=120HZ ,Co=25uF Tan
Io=2.5A,Vin-Vo=3V
Io=10mA,Vin-Vo=1.5V,Tj=25
Vin=5V,Vadj=0V,Io=10mA
Tj=125
°
C,1000 Hrs
Tj=25
°
C 10hz<f<10khz
MIN
TYP
3.267 3.300
3.234 3.300
MAX
3.330
3.366
0.2
0.4
1.3
10
0.02
UNITS
V
%
%
V
A
mA
%/W
dB
uA
%
%
%Vo
ELECTRICAL SPECIFICATIONS
∆V
O
1.1
5.1
5
0.01
60
70
0.2
0.5
0.3
0.003
5
1
Note 1 :
Low duty cycle pulse testing with Kelvin con-
nections are required in order to maintain accurate data.
Note 2 :
Drop-out voltage is defined as the minimum
differential voltage between Vin and Vout required to main-
tain regulation at Vout. It is measured when the output
voltage drops 1% below its nominal value.
Note 3 :
Minimum load current is defined as the mini-
mum current required at the output in order for the out-
put voltage to maintain regulation. Typically the resistor
dividers are selected such that it automatically main-
tains this current.
2-34
Rev. 1.1
10/27/00
US1050-33
PIN DESCRIPTIONS
PIN #
1
2
3
PIN SYMBOL
Gnd
Vout
Vin
PIN DESCRIPTION
This pin must be connected to GND plane using a low inductance short connection.
The output of the regulator. A minimum of 10uF capacitor must be connected
from this pin to ground to insure stability.
The input pin of the regulator. Typically a large storage capacitor is connected
from this pin to ground to insure that the input voltage does not sag below the
minimum drop out voltage during the load transient response. This pin must
always be 1.3V higher than Vout in order for the device to regulate properly.
BLOCK DIAGRAM
Vin 3
2 Vout
+
+
1.25V
CURRENT
LIMIT
THERMAL
SHUTDOWN
1 Gnd
1050-33blk1-1.0
Figure 1 - Simplified block diagram of the US1050-33
APPLICATION INFORMATION
Stability
The US1050-33 requires the use of an output capacitor
as part of the frequency compensation in order to make
the regulator stable. Typical designs for microproces-
sor applications use standard electrolytic capacitors with
a typical ESR in the range of 50 to 100 m
Ω
and an
output capacitance of 500 to 1000uF. Fortunately as
the capacitance increases, the ESR decreases result-
ing in a fixed RC time constant. The US1050-33 takes
advantage of this phenomena in making the overall regu-
lator loop stable.For most applications a minimum of
100uF aluminum electrolytic capacitor such as Sanyo
MVGX series ,Panasonic FA series as well as the
Nichicon PL series insures both stability and good tran-
sient response.
Rev. 1.1
10/27/00
2-35
FPGA/CPLD
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