defining a degree of excellence
1 TAP BOTH EDGES CONTROLLED
STANDARD DELAY MODULES
.60 + .02
.375
.350
.60 + .02
8 Out
.285 Max
Vcc 14
In 1
Gnd 7
.325
Cat 23-R3
bel
(DC)
(P/N)
bel
*
(DC)
(P/N)
.285 Max
.80 Max
.22 Max
.018
Coplanarity + .002
.015
.004
.80 Max
4
o
.012
.008
.012
.008
.23 Max
100
o
90
o
.20 Max
.015 Min
.045
.030
.12 Min
.018
Part Numbers
SMD
S422-0010-06
S422-0020-06
S422-0030-06
S422-0040-06
S422-0050-06
S422-0060-06
S422-0070-06
S422-0080-06
S422-0090-06
S422-0100-06
S422-0125-06
S422-0150-06
S422-0200-06
Thru-Hole
A447-0010-06
A447-0020-06
A447-0030-06
A447-0040-06
A447-0050-06
A447-0060-06
A447-0070-06
A447-0080-06
A447-0090-06
A447-0100-06
A447-0125-06
A447-0150-06
A447-0200-06
Time
Delay
10 ns
20 ns
30 ns
40 ns
50 ns
60 ns
70 ns
80 ns
90 ns
100 ns
125 ns
150 ns
200 ns
Rise
Tolerance Time
+ 2.0 ns
3 ns
+ 2.0 ns
+ 2.0 ns
+ 2.0 ns
+ 2.5 ns
+ 3.0 ns
+ 3.5 ns
+ 4.0 ns
+ 4.5 ns
+ 5.0 ns
+ 6.3 ns
+ 7.5 ns
+ 8.0 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
3 ns
Vcc
Vih
Vil
Ioh
Iol
Voh
Vol
Vik
Iih
Iil
Ios
Icch
Iccl
Ta
PW
d
Tc
Ein
Trin
PW
PP
Iccl
Vcc
Test Conditions @ 25
o
C
Pulse Voltage
Rise Time
Pulse Width
Pulse Period
Supply Current
Supply Voltage
3.2 Volts
3.0 ns (10%-90%)
1.2 x Total Delay
4 x Pulse Width
35 ma Typical
5.0 Volts
Electrical Characteristics
Supply Voltage
Logic 1 Input Voltage
Logic 0 Input Voltage
Logic 1 Output Current
Logic 0 Output Current
Logic 1 Output Voltage
Logic 0 Output voltage
Input Clamp Voltage
Logic 1 Input Current
Logic 0 Input Current
Short Circuit Output Current
Logic 1 Supply Current
Logic 0 Supply Current
Operating Free Air Temperature
Min. Input Pulse Width of Total Delay
Maximum Duty Cycle
Min.
4.75
2.0
Max.
5.25
0.8
-1
20
2.7
0.5
-1.2
20
-0.6
-150
25
40
70
o
50
Units
V
V
V
ma
ma
V
V
V
ua
ma
ma
ma
ma
C
%
%
Tolerances
Input to Output + 2 ns or 5% , Whichever is Greater
Delays measured @ 1.5 V levels on Leading Edge and
Trailing Edge with no loads on Output
Rise and Fall Times measured from 0.75 V to 2.4 V levels
-60
0
o
40
Drive Capabilities
Nh Logic 1 Fanout
Nl
Logic 0 Fanout
-
-
10 TTL Loads Max.
10 TTL Loads Max.
Temp. Coeff. of Total Delay (TD) 100 + (25000/TD) PPM/
O
C
Notes
Transfer molded for better reliability
Compatible with TTL & DTL circuits
Terminals: Electro-Tin plate phosphor bronze
Performance warranty is limited to specified parameters listed
SMD - Tape & Reel available:
32mm Wide x 16mm Pitch, 500 pieces per 13" reel
Recommended Temperature Profile
300
o
C
200
o
C
100
o
C
Temp.
Infra Red
225
o
C Max Temp.
> 185
o
C
for 90 Seconds Max
0
2
4
6
Ti m e i n M i n u t e s
8
Other Delays and Tolerances Available
Consult Sales
Specifications subject to change without notice.
Corporate Office
Bel Fuse Inc.
198 Van Vorst Street, Jersey City, NJ 07302-4496
Tel: 201-432-0463
Fax: 201-432-9542
E-Mail: BelFuse@belfuse.com
Internet: http://www.belfuse.com
Far East Office
Bel Fuse Ltd.
8F/8 Luk Hop Street
San Po Kong
Kowloon, Hong Kong
Tel: 852-2328-5515
Fax: 852-2352-3706
European Office
Bel Fuse Europe Ltd.
Preston Technology Management Centre
Marsh Lane, Preston PR1 8UD
Lancashire, U.K.
Tel: 44-1772-556601
Fax: 44-1772-888366
9
下载中心专版
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
