HIGH-SPEED
4K x 9 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT7014S
FEATURES:
• True Dual-Ported memory cells which allow simultaneous
access of the same memory location
• High-speed access
— Military: 20/25/35ns (max.)
— Commercial: 12/15/20/25ns (max.)
• Low-power operation
— IDT7014S
Active: 900mW (typ.)
• Fully asynchronous operation from either port
• TTL-compatible; single 5V (±10%) power supply
• Available in 52-pin PLCC and a 64-pin TQFP
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT7014 is an extremely high-speed 4K x 9 Dual-Port
Static RAM designed to be used in systems where on-chip
hardware port arbitration is not needed. This part lends itself
to high-speed applications which do not need on-chip arbitra-
tion to manage simultaneous access.
The IDT7014 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. See functional description.
The IDT7014 utilitizes a 9-bit wide data path to allow for
parity at the user's option. This feature is especially useful in
data communication applications where it is necessary to use
a parity bit for transmission/reception error checking.
Fabricated using IDT’s high-performance technology, the
IDT7014 Dual-Ports typically operate on only 900mW of
power at maximum access times as fast as 12ns.
The IDT7014 is packaged in a 52-pin PLCC and a 64-pin
thin plastic quad flatpack (TQFP).
FUNCTIONAL BLOCK DIAGRAM
R/
W
L
R/
W
R
OE
L
I/O
0L
- I/O
8L
COLUMN
CONTROL
COLUMN
CONTROL
OE
R
I/O
0R
- I/O
8R
A
0L
- A
11L
LEFT SIDE
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
RIGHT SIDE
ADDRESS
DECODE
LOGIC
A
0R
- A
11R
2528 drw 01
The IDT logo is a registereed trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2528/6
6.11
1
IDT7014S
HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
(1,2)
INDEX
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Terminal Voltage
with Respect to
GND
Terminal Voltage
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
DC Output Current
Commercial
–0.5 to +7.0
Military
–0.5 to +7.0
Unit
V
V
TERM
(2)
A
6L
A
7L
A
8L
A
9L
A
10L
A
11L
OE
L
V
CC
R/
L
GND
I/O
8L
I/O
7L
I/O
6L
W
7 6 5 4 3 2
52 51 50 49 48 47
1
8
46
45
9
10
44
11
43
12
42
IDT 7014
13
41
J52-1
PLCC
14
40
15
39
Top View (3)
16
38
17
37
18
36
19
35
20
34
21 22 23 24 25 26 27 28 29 30 31 32 33
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
A
10R
A
11R
V
TERM
(3)
T
A
T
BIAS
T
STG
I
OUT
–0.5 to Vcc
0 to +70
–55 to +125
–55 to +125
50
–0.5 to Vcc
V
–55 to +125
°C
–65 to +135
°C
OE
R
GND
R/
R
GND
I/O
8R
I/O
7R
I/O
6R
I/O
5R
W
–65 to +150
°C
50
mA
2528 drw 02
NOTES:
2528 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. V
TERM
must not exceed Vcc + 0.5V for more than 25% of the cycle time
or 10ns maximum, and is limited to < 20mA for the period of V
TERM
> Vcc
+ 0.5V.
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
N/C
N/C
N/C
N/C
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
I/O
5L
V
CC
I/O
4L
I/O
3L
I/O
2L
I/O
1L
I/O
0L
I/O
0R
I/O
1R
I/O
2R
I/O
3R
V
CC
I/O
4R
INDEX
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
A
6R
A
7R
A
8R
A
9R
A
10R
A
11R
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
A
6L
A
7L
A
8L
A
9L
A
10L
A
11L
OE
L
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
N/C
V
CC
N/C
R/
L
N/C
GND
I/O
8L
I/O
7L
I/O
6L
W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Grade
Military
Commercial
Ambient
Temperature
–55°C to +125°C
0°C to +70°C
GND
0V
0V
VCC
5.0V
±
10%
5.0V
±
10%
2528 tbl 02
IDT7014
PN64-1
TQFP
Top View (3)
OE
R
N/C
GND
N/C
R/
R
N/C
GND
I/O
8R
I/O
7R
I/O
6R
W
RECOMMENDED DC OPERATING
CONDTIONS
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
–0.5
(1)
Typ.
5.0
0
—
—
Max.
5.5
0
6.0
(2)
0.8
Unit
V
V
V
V
2528 tbl 03
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All ground pins must be connected to ground supply.
3. This text does not indicate the orientation of the actual part-marking
I/O
5L
V
CC
I/O
4L
I/O
3L
I/O
2L
I/O
1L
I/O
0L
GND
GND
I/O
0R
I/O
1R
I/O
2R
I/O
3R
V
CC
I/O
4R
I/O
5R
2528 drw 03
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. VTERM must not exceed Vcc + 0.5V.
6.11
2
IDT7014S
HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(V
CC
= 5.0V
±
10%)
IDT7014S
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Condition
V
CC
= 5.5V, V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
I
OL
= 4mA
I
OH
= –4mA
Min.
—
—
—
2.4
Max.
10
10
0.4
—
Unit
µA
µA
V
V
2528 tbl 04
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(V
CC
= 5V
±
10%)
Test
Symbol
I
CC
Parameter
Dynamic
Operating
Current (Both
Ports Active)
Condition
Outputs Open
f = f
MAX
(1)
Version
Mil.
Com’l.
IDT7014S12
Com'l. Only
Typ.
—
160
Max.
—
250
IDT7014S15
Com'l. Only
Typ.
160
160
Max.
260
250
IDT7014S20
Typ.
155
155
Max.
260
245
IDT7014S25
Typ.
150
150
Max.
255
240
IDT7014S35
Mil. Only
Typ.
150
—
Max.
250
—
2528 tbl 05
Unit
mA
NOTE:
1. At f = fmax, address inputs are cycling at the maximum read cycle of 1/t
RC
using the "AC Test Conditions" input levels of GND to 3V.
5V
5V
893Ω
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns
1.5V
1.5V
Figures 1, 2, and 3
2528 tbl 06
893Ω
DATA
OUT
DATA
OUT
BUSY
INT
347Ω
30pF
2528 drw 04
347Ω
5pF
2528 drw 05
Figure 1. AC Output Test Load.
CAPACITANCE
Symbol
C
IN
C
OUT
(1)
Figure 2. Output Test Load
(for t
HZ
, t
WZ
, and t
OW
)
(T
A
= +25°C, f = 1.0MHz) TQFP Package Only
Parameter
Input Capacitance
Output Capacitance
Condition
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max. Unit
9
10
pF
pF
8
7
6
∆t
AA
(Typical, ns)
5
4
3
2
1
0
-1
Including scope and jig.
2528 tbl 07
NOTES:
1. This parameter is determined by device characteristics but is not tested.
2. 3dv references the interperlated capacitance when the input and output
signals swith from 0V to 3V or from 3V to 0V.
- 10pF is the I/O capacitance
of this device, and 3 pF is the
AC Test Load Capacitance
20 40 60 80 100 120 140 160 180 200
Capacitance (pF)
2528 drw 06
Figure 3. Typical Output Derating (Lumped Capacitive Load).
6.11
3
IDT7014S
HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
7014S12
Com'l. Only
Symbol
READ CYCLE
t
RC
t
AA
t
AOE
t
OH
t
LZ
t
HZ
Read Cycle Time
Address Access Time
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
(1, 2)
Output High-Z Time
(1, 2)
12
—
—
3
3
—
—
12
8
—
—
7
15
—
—
3
3
—
—
15
8
—
—
7
20
—
—
3
3
—
—
20
10
—
—
9
25
—
—
3
3
—
—
25
12
—
—
11
35
—
—
3
3
—
—
35
20
—
—
15
ns
ns
ns
ns
ns
ns
2528 tbl 08
7014S15
Com'l. Only
Min.
Max.
7014S20
7014S25
7014S35
Mil. Only
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
NOTES:
1. Transition is measured
±200mV
from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is determined by device characterization, but is not production tested.
TIMING WAVEFORM OF READ CYCLE NO. 1, EITHER SIDE
(1,2)
t
RC
ADDRESS
t
AA
t
OH
DATA
OUT
PREVIOUS DATA VALID
t
OH
DATA VALID
2528 drw 07
TIMING WAVEFORM OF READ CYCLE NO. 2, EITHER SIDE
(1, 3)
t
AOE
OE
t
LZ
DATA
OUT
VALID DATA
t
HZ
NOTES:
1. R/
W
= V
IH
for Read Cycles.
2.
OE
= V
IL
.
3. Addresses valid prior to
OE
transition LOW.
2528 drw 08
6.11
4
IDT7014S
HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
7014S12
Symbol
WRITE CYCLE
t
WC
t
AW
t
AS
t
WP
t
WR
t
DW
t
HZ
t
DH
t
WZ
t
OW
t
WDD
t
DDD
Write Cycle Time
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Output High-Z Time
(1, 2)
Data Hold Time
(3)
Write Enabled to Output in High-Z
(1, 2)
Output Active from End-of-Write
(1, 2, 3)
Write Pulse to Data Delay
(4)
Write Data Valid to Read Data Delay
(4)
12
10
0
10
1
8
—
0
—
0
—
—
—
—
—
—
—
—
7
—
7
—
25
22
15
14
0
12
1
10
—
0
—
0
—
—
—
—
—
—
—
—
7
—
7
—
30
25
20
15
0
15
2
12
—
0
—
0
—
—
—
—
—
—
—
—
9
—
9
—
40
30
25
20
0
20
2
15
—
0
—
0
—
—
—
—
—
—
—
—
11
—
11
—
45
35
35
30
0
30
2
25
—
0
—
0
—
—
—
—
—
—
—
—
15
—
15
—
55
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Com'l. Only
Min. Max.
7014S15
Com'l. Only
Min. Max.
7014S20
Min.
Max.
7014S25
Min.
Max.
7014S35
Mil. Only
Min. Max.
Unit
NOTES:
2528 tbl 09
1. Transition is measured
±200mV
from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. The specification for t
DH
must be met by the device supplying write data to the RAM under all operating conditions. Although t
DH
and t
OW
values will vary
over voltage and temperature, the actual t
DH
will always be smaller than the actual t
OW
.
4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write With Port-to-Port Read”.
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ
(1,2)
t
WC
ADDR
"A"
MATCH
t
WP
R/
W
"A"
t
DW
DATA
IN "A"
VALID
t
DH
ADDR
"B"
MATCH
t
WDD
DATA
OUT "B"
t
DDD
NOTES:
1. R/
W
"B"
= V
IH
, Read cycle pass through.
2. All timing is the same for left and right ports. Port "A" may be either left or right port. Port "B" is opposite from port "A".
VALID
2528 drw 09
6.11
5
Microchip MCU
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