Philips Semiconductors
Product specification
PowerMOS transistor
BUK438W-800A/B
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope.
The device is intended for use in
Switched Mode Power Supplies
(SMPS), motor control, welding,
DC/DC and AC/DC converters, and
in general purpose switching
applications.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
R
DS(ON)
PARAMETER
BUK438
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state
resistance
MAX.
-800A
800
7.6
220
1.5
MAX.
-800B
800
6.6
220
2.0
UNIT
V
A
W
Ω
PINNING - SOT429 (TO247)
PIN
1
2
3
tab
gate
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
SYMBOL
d
g
1
2
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±V
GS
I
D
I
D
I
DM
P
tot
T
stg
T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
-
R
GS
= 20 kΩ
-
T
mb
= 25 ˚C
T
mb
= 100 ˚C
T
mb
= 25 ˚C
T
mb
= 25 ˚C
-
-
MIN.
-
-
-
-
-
-
-
- 55
-
-800A
7.6
4.8
30
220
150
150
MAX.
800
800
30
-800B
6.6
4.1
26
UNIT
V
V
V
A
A
A
W
˚C
˚C
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
MIN.
-
-
TYP.
-
45
MAX.
0.57
-
UNIT
K/W
K/W
February 1998
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK438W-800A/B
STATIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)
PARAMETER
Drain-source breakdown
voltage
Gate threshold voltage
Zero gate voltage drain current
Zero gate voltage drain current
Gate source leakage current
Drain-source on-state
resistance
CONDITIONS
V
GS
= 0 V; I
D
= 0.25 mA
V
DS
= V
GS
; I
D
= 1 mA
V
DS
= 800 V; V
GS
= 0 V; T
j
= 25 ˚C
V
DS
= 800 V; V
GS
= 0 V; T
j
=125 ˚C
V
GS
=
±30
V; V
DS
= 0 V
V
GS
= 10 V;
BUK438-800A
BUK438-800B
I
D
= 4.0 A
MIN.
800
2.1
-
-
-
-
-
TYP.
-
3.0
5
0.1
10
1.2
1.6
MAX.
-
4.0
50
1.0
100
1.5
2.0
UNIT
V
V
µA
mA
nA
Ω
Ω
DYNAMIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
d
L
s
PARAMETER
Forward transconductance
Input capacitance
Output capacitance
Feedback capacitance
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
Internal drain inductance
Internal drain inductance
Internal source inductance
CONDITIONS
V
DS
= 25 V; I
D
= 4.0 A
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
V
DD
= 30 V; I
D
= 2.6 A;
V
GS
= 10 V; R
GS
= 50
Ω;
R
gen
= 50
Ω
Measured from contact screw on
tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
MIN.
3.0
-
-
-
-
-
-
-
-
-
-
TYP.
7.5
2000
200
100
40
100
300
100
5
5
12.5
MAX.
-
3000
300
200
90
140
430
140
-
-
-
UNIT
S
pF
pF
pF
ns
ns
ns
ns
nH
nH
nH
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
I
DR
I
DRM
V
SD
t
rr
Q
rr
PARAMETER
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
CONDITIONS
-
-
I
F
= 7.6 A ;V
GS
= 0 V
I
F
= 7.6 A; -dI
F
/dt = 100 A/µs;
V
GS
= 0 V; V
R
= 100 V
MIN.
-
-
-
-
-
TYP.
-
-
0.9
1.5
20
MAX.
7.6
30
1.3
-
-
UNIT
A
A
V
µs
µC
February 1998
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK438W-800A/B
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
1
Zth j-mb / (K/W)
D=
0.5
BUKx38-hv
0.1
0.2
0.1
0.05
0.02
0.01
P
D
0
T
t
p
D=
t
p
T
t
1E+01
0
20
40
60
80
100
Tmb / C
120
140
0.001
1E-07
1E-05
1E-03
t/s
1E-01
Fig.1. Normalised power dissipation.
PD% = 100
⋅
P
D
/P
D 25 ˚C
= f(T
mb
)
ID%
Normalised Current Derating
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
ID / A
BUK4y8-800A
VGS / V =
15
10
6
5.5
120
110
100
90
80
70
60
50
40
30
20
10
0
20
10
5
5
4.5
4
0
0
20
40
60
80
Tmb / C
100
120
140
0
10
VDS / V
20
30
Fig.2. Normalised continuous drain current.
ID% = 100
⋅
I
D
/I
D 25 ˚C
= f(T
mb
); conditions: V
GS
≥
10 V
BUK438-800
A
B
tp = 10 us
Fig.5. Typical output characteristics, T
j
= 25 ˚C.
I
D
= f(V
DS
); parameter V
GS
BUK4y8-800A
100
ID / A
5
RDS(ON) / Ohm
4
4.5
10
S(
RD
)=
ON
S/
VD
ID
4
5
3
100 us
1 ms
VGS / V =
2
5.5
1
DC
6
10
10 ms
100 ms
1
0.1
10
100
VDS / V
1000
0
0
5
10
ID / A
15
20
Fig.3. Safe operating area. T
mb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.6. Typical on-state resistance, T
j
= 25 ˚C.
R
DS(ON)
= f(I
D
); parameter V
GS
February 1998
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK438W-800A/B
20
ID / A
BUK4y8-800A
4
VGS(TO) / V
max.
15
Tj / C = 25
3
typ.
10
150
5
min.
2
1
0
0
0
2
4
VGS / V
6
8
-60
-40
-20
0
20
40
60
Tj / C
80
100
120
140
Fig.7. Typical transfer characteristics.
I
D
= f(V
GS
) ; conditions: V
DS
= 25 V; parameter T
j
gfs / S
BUK4y8-800A
Fig.10. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
ID / A
SUB-THRESHOLD CONDUCTION
15
1E-01
1E-02
10
1E-03
2%
typ
98 %
1E-04
5
1E-05
0
0
5
ID / A
10
15
1E-06
0
1
2
VGS / V
3
4
Fig.8. Typical transconductance, T
j
= 25 ˚C.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
a
Normalised RDS(ON) = f(Tj)
Fig.11. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
10000
2
Ciss
1000
C / pF
1
Coss
100
Crss
0
-60
-40
-20
0
20
40 60
Tj / C
80
100 120 140
10
0
20
VDS / V
40
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 4 A; V
GS
= 10 V
Fig.12. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
February 1998
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistor
BUK438W-800A/B
12
10
VGS / V
20
IF / A
BUK4y8-800
15
8
6
4
VDS / V = 160
640
10
Tj / C = 150
25
5
2
0
0
20
40
QG / nC
60
80
100
0
0
0.2
0.4
0.6
0.8
VSDS / V
1
1.2
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 7.6 A; parameter V
DS
Fig.14. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
February 1998
5
Rev 1.000
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