电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

74FCT273ATSOG

产品描述SOIC-20, Tube
产品类别逻辑    逻辑   
文件大小75KB,共7页
制造商IDT (Integrated Device Technology)
标准  
下载文档 详细参数 选型对比 全文预览

74FCT273ATSOG概述

SOIC-20, Tube

74FCT273ATSOG规格参数

参数名称属性值
Brand NameIntegrated Device Technology
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码SOIC
包装说明SOP, SOP20,.4
针数20
制造商包装代码PSG20
Reach Compliance Codeunknown
JESD-30 代码R-PDSO-G20
JESD-609代码e3
负载电容(CL)50 pF
逻辑集成电路类型D FLIP-FLOP
最大频率@ Nom-Sup83300000 Hz
最大I(ol)0.048 A
湿度敏感等级1
功能数量8
端子数量20
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP20,.4
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)260
电源5 V
Prop。Delay @ Nom-Sup7.2 ns
认证状态Not Qualified
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn) - annealed
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
触发器类型POSITIVE EDGE

文档预览

下载PDF文档
IDT54/74FCT273T/AT/CT
FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS
OCTAL D FLIP-FLOP
WITH MASTER RESET
FEATURES:
IDT54/74FCT273T/AT/CT
DESCRIPTION:
Std., A, and C grades
Low input and output leakage
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, SSOP, QSOP
– Military: CERDIP, LCC
The FCT273T is an octal D flip-flop built using an advanced dual metal
CMOS technology. The FCT273T has eight edge-triggered D-type flip-
flops with individual D inputs and O outputs. The common buffered Clock
(CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one set-
up time before the low-to-high clock transition, is transferred to the corre-
sponding flip-flop’s O output.
All outputs will be forced low independently of Clock or Data inputs by
a low voltage level on the
MR
input. The device is useful for applications
where the true output only is required and the Clock and Master Reset are
common to all storage elements.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
CP
R
D
MR
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
D
CP
R
D
Q
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-2568/2
© 2002 Integrated Device Technology, Inc.

74FCT273ATSOG相似产品对比

74FCT273ATSOG 74FCT273ATQ8 74FCT273ATPY8 74FCT273CTQ8 74FCT273CTSOG8 74FCT273CTSOG 74FCT273CTSO8 74FCT273ATSO8 74FCT273CTPY8
描述 SOIC-20, Tube QSOP-20, Reel SSOP-20, Reel QSOP-20, Reel SOIC-20, Reel SOIC-20, Tube SOIC-20, Reel SOIC-20, Reel SSOP-20, Reel
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
是否无铅 不含铅 含铅 含铅 含铅 不含铅 不含铅 含铅 含铅 含铅
是否Rohs认证 符合 不符合 不符合 不符合 符合 符合 不符合 不符合 不符合
零件包装代码 SOIC QSOP SSOP QSOP SOIC SOIC SOIC SOIC SSOP
针数 20 20 20 20 20 20 20 20 20
制造商包装代码 PSG20 PC20 PY20 PC20 PSG20 PSG20 PS20 PS20 PY20
Reach Compliance Code unknown not_compliant not_compliant not_compliant unknown unknown not_compliant not_compliant not_compliant
JESD-30 代码 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e3 e0 e0 e0 e3 e3 e0 e0 e0
负载电容(CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
逻辑集成电路类型 D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
最大频率@ Nom-Sup 83300000 Hz 83300000 Hz 83300000 Hz 83300000 Hz 83300000 Hz 83300000 Hz 83300000 Hz 83300000 Hz 83300000 Hz
最大I(ol) 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A
湿度敏感等级 1 1 1 1 1 1 1 1 1
功能数量 8 8 8 8 8 8 8 8 8
端子数量 20 20 20 20 20 20 20 20 20
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP SSOP SSOP SSOP SOP SOP SOP SOP SSOP
封装等效代码 SOP20,.4 SSOP20,.25 SSOP20,.3 SSOP20,.25 SOP20,.4 SOP20,.4 SOP20,.4 SOP20,.4 SSOP20,.3
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度) 260 240 240 240 260 260 225 225 240
电源 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
Prop。Delay @ Nom-Sup 7.2 ns 7.2 ns 7.2 ns 5.8 ns 5.8 ns 5.8 ns 5.8 ns 7.2 ns 5.8 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 Matte Tin (Sn) - annealed Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
端子形式 GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
端子节距 1.27 mm 0.635 mm 0.635 mm 0.635 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 0.635 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
触发器类型 POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
包装说明 SOP, SOP20,.4 SSOP, SSOP20,.25 - SSOP, SSOP20,.25 SOP, SOP20,.4 SOP, SOP20,.4 SOP, SOP20,.4 SOP, SOP20,.4 SSOP, SSOP20,.3
包装方法 - TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL - TAPE AND REEL TAPE AND REEL TAPE AND REEL

推荐资源

热门文章更多

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1056  285  1653  56  1261  22  6  34  2  26 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved