Advance
‡
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Mobile Low-Power SDR SDRAM
MT48H32M16LF – 8 Meg x 16 x 4 Banks
MT48H16M32LF/LG – 4 Meg x 32 x 4 Banks
Features
•
V
DD
/V
DDQ
= 1.7–1.95V
•
Fully synchronous; all signals registered on positive
edge of system clock
•
Internal, pipelined operation; column address can
be changed every clock cycle
•
Four internal banks for concurrent operation
•
Programmable burst lengths: 1, 2, 4, 8, and continu-
ous
•
Auto precharge, includes concurrent auto precharge
•
Auto refresh and self refresh modes
•
LVTTL-compatible inputs and outputs
•
On-chip temperature sensor to control self refresh
rate
•
Partial-array self refresh (PASR)
•
Deep power-down (DPD)
•
Selectable output drive strength (DS)
•
64ms refresh period
Options
•
V
DD
/V
DDQ
: 1.8V/1.8V
•
Addressing
–
Standard addressing option
–
Reduced page size option
1
•
Configuration
–
32 Meg x 16 (8 Meg x 16 x 4 banks)
–
16 Meg x 32 (4 Meg x 32 x 4 banks)
•
Plastic “green” packages
–
54-ball VFBGA (8mm x 8mm)
2
–
90-ball VFBGA (8mm x 13mm)
3
•
Timing – cycle time
–
6ns at CL = 3
–
7.5ns at CL = 3
•
Power
–
Standard I
DD2
/I
DD7
–
Low-power I
DD2
/I
DD71
•
Operating temperature range
–
Commercial (0˚C to +70˚C)
–
Industrial (–40˚C to +85˚C)
•
Revision
Marking
H
LF
LG
32M16
16M32
B4
B5
-6
-75
None
L
None
IT
:C
Notes:
1. Contact factory for availability.
2. Available only for x16 configuration.
3. Available only for x32 configuration.
Table 1: Configuration Addressing
Architecture
Number of banks
Bank address balls
Row address balls
Column address balls
Note: 1. Contact factory for availability.
32 Meg x 16
4
BA0, BA1
A[12:0]
A[9:0]
16 Meg x 32
4
BA0, BA1
A[12:0]
A[8:0]
16 Meg x 32 Reduced
Page Size Option
1
4
BA0, BA1
A[13:0]
A[7:0]
Table 2: Key Timing Parameters
Clock Rate (MHz)
Speed Grade
-6
Note:
CL = 2
104
CL = 3
166
133
CL = 2
8ns
8ns
Access Time
CL = 3
5ns
5.4ns
-75
104
1. CL = CAS (READ) latency.
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m.pdf – Rev. A 2/10 EN
1
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
Advance
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Features
Figure 1: 512Mb Mobile LPSDR Part Numbering
MT
Micron Technology
Product Family
48 = Mobile LPSDR SDRAM
48
H 32M16 LF
B4
-75
IT
:C
Design Revision
:C = Device generation
Operating Temperature
Blank = Commercial (0°C to +70°C)
IT = Industrial (–40°C to +85°C)
Operating Voltage
H = 1.8V/1.8V
Low Power
Configuration
32M16 = 32 Meg x 16
16M32 = 16 Meg x 32
Blank = Standard I
DD2
/I
DD7
L = Low-power I
DD2
/I
DD7
Cycle Time
Addressing
LF = Standard addressing
LG = Reduced page size
-6 = 6ns,
t
CK CL = 3
-75 = 7.5ns,
t
CK CL = 3
Package Codes
B4 = 8mm x 8mm, VFBGA, “green”
B5 = 8mm x 13mm, VFBGA, “green”
FBGA Part Marking Decoder
Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the
part number. Micron’s FBGA part marking decoder is available at
www.micron.com/decoder.
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m.pdf – Rev. A 2/10 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
Advance
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
General Description ......................................................................................................................................... 7
Functional Block Diagram ................................................................................................................................ 8
Ball Assignments and Descriptions ................................................................................................................... 9
Package Dimensions ...................................................................................................................................... 12
Electrical Specifications .................................................................................................................................. 14
Absolute Maximum Ratings ........................................................................................................................ 14
Electrical Specifications – I
DD
Parameters ........................................................................................................ 16
Electrical Specifications – AC Operating Conditions ......................................................................................... 19
Output Drive Characteristics ........................................................................................................................... 22
Functional Description ................................................................................................................................... 25
Commands .................................................................................................................................................... 26
COMMAND INHIBIT .................................................................................................................................. 27
NO OPERATION (NOP) .............................................................................................................................. 27
LOAD MODE REGISTER (LMR) ................................................................................................................... 27
ACTIVE ...................................................................................................................................................... 27
READ ......................................................................................................................................................... 28
WRITE ....................................................................................................................................................... 29
PRECHARGE .............................................................................................................................................. 30
BURST TERMINATE ................................................................................................................................... 30
AUTO REFRESH ......................................................................................................................................... 30
SELF REFRESH ........................................................................................................................................... 31
DEEP POWER-DOWN ................................................................................................................................ 31
Truth Tables ................................................................................................................................................... 32
Initialization .................................................................................................................................................. 37
Mode Register ................................................................................................................................................ 39
Burst Length .............................................................................................................................................. 40
Burst Type ................................................................................................................................................. 40
CAS Latency ............................................................................................................................................... 42
Operating Mode ......................................................................................................................................... 42
Write Burst Mode ....................................................................................................................................... 42
Extended Mode Register ................................................................................................................................. 43
Temperature-Compensated Self Refresh ..................................................................................................... 43
Partial-Array Self Refresh ............................................................................................................................ 44
Output Drive Strength ................................................................................................................................ 44
Bank/Row Activation ...................................................................................................................................... 45
READ Operation ............................................................................................................................................. 46
WRITE Operation ........................................................................................................................................... 55
Burst Read/Single Write .............................................................................................................................. 62
PRECHARGE Operation .................................................................................................................................. 63
Auto Precharge ........................................................................................................................................... 63
AUTO REFRESH Operation ............................................................................................................................. 75
SELF REFRESH Operation .............................................................................................................................. 77
Power-Down .................................................................................................................................................. 79
Deep Power-Down ......................................................................................................................................... 80
Clock Suspend ............................................................................................................................................... 81
Revision History ............................................................................................................................................. 84
Rev. A, Advance – 2/10 ................................................................................................................................ 84
Contents
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m.pdf – Rev. A 2/10 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
Advance
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Table 1: Configuration Addressing ................................................................................................................... 1
Table 2: Key Timing Parameters ...................................................................................................................... 1
Table 3: VFBGA Ball Descriptions .................................................................................................................. 11
Table 4: Absolute Maximum Ratings .............................................................................................................. 14
Table 5: DC Electrical Characteristics and Operating Conditions ..................................................................... 14
Table 6: Capacitance ..................................................................................................................................... 15
Table 7: I
DD
Specifications and Conditions (x16) ............................................................................................ 16
Table 8: I
DD
Specifications and Conditions (x32) ............................................................................................ 16
Table 9: I
DD7
Specifications and Conditions (x16 and x32) ............................................................................... 17
Table 10: Electrical Characteristics and Recommended AC Operating Conditions ............................................ 19
Table 11: AC Functional Characteristics ......................................................................................................... 20
Table 12: Target Output Drive Characteristics (Full Strength) .......................................................................... 22
Table 13: Target Output Drive Characteristics (Three-Quarter Strength) .......................................................... 23
Table 14: Target Output Drive Characteristics (One-Half Strength) ................................................................. 24
Table 15: Truth Table – Commands and DQM Operation ................................................................................ 26
Table 16: Truth Table – Current State Bank
n,
Command to Bank
n
................................................................. 32
Table 17: Truth Table – Current State Bank n, Command to Bank
m
................................................................ 34
Table 18: Truth Table – CKE .......................................................................................................................... 36
Table 19: Burst Definition Table .................................................................................................................... 41
List of Tables
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m.pdf – Rev. A 2/10 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
Advance
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Figure 1: 512Mb Mobile LPSDR Part Numbering .............................................................................................. 2
Figure 2: Functional Block Diagram ................................................................................................................. 8
Figure 3: 54-Ball VFBGA (Top View) ................................................................................................................. 9
Figure 4: 90-Ball VFBGA (Top View) ............................................................................................................... 10
Figure 5: 54-Ball VFBGA (8mm x 8mm) .......................................................................................................... 12
Figure 6: 90-Ball VFBGA (8mm x 13mm) ......................................................................................................... 13
Figure 7: Typical Self Refresh Current vs. Temperature – TBD ......................................................................... 18
Figure 8: ACTIVE Command .......................................................................................................................... 27
Figure 9: READ Command ............................................................................................................................. 28
Figure 10: WRITE Command ......................................................................................................................... 29
Figure 11: PRECHARGE Command ................................................................................................................ 30
Figure 12: Initialize and Load Mode Register .................................................................................................. 38
Figure 13: Mode Register Definition ............................................................................................................... 39
Figure 14: CAS Latency .................................................................................................................................. 42
Figure 15: Extended Mode Register Definition ................................................................................................ 43
Figure 16: Example: Meeting
t
RCD (MIN) When 2 <
t
RCD (MIN)/
t
CK < 3 ......................................................... 45
Figure 17: Consecutive READ Bursts .............................................................................................................. 47
Figure 18: Random READ Accesses ................................................................................................................ 48
Figure 19: READ-to-WRITE ............................................................................................................................ 49
Figure 20: READ-to-WRITE With Extra Clock Cycle ......................................................................................... 50
Figure 21: READ-to-PRECHARGE .................................................................................................................. 50
Figure 22: Terminating a READ Burst ............................................................................................................. 51
Figure 23: Alternating Bank Read Accesses ..................................................................................................... 52
Figure 24: READ Continuous Page Burst ........................................................................................................ 53
Figure 25: READ – DQM Operation ................................................................................................................ 54
Figure 26: WRITE Burst ................................................................................................................................. 55
Figure 27: WRITE-to-WRITE .......................................................................................................................... 56
Figure 28: Random WRITE Cycles .................................................................................................................. 57
Figure 29: WRITE-to-READ ............................................................................................................................ 57
Figure 30: WRITE-to-PRECHARGE ................................................................................................................. 58
Figure 31: Terminating a WRITE Burst ........................................................................................................... 59
Figure 32: Alternating Bank Write Accesses .................................................................................................... 60
Figure 33: WRITE – Continuous Page Burst .................................................................................................... 61
Figure 34: WRITE – DQM Operation ............................................................................................................... 62
Figure 35: READ With Auto Precharge Interrupted by a READ ......................................................................... 64
Figure 36: READ With Auto Precharge Interrupted by a WRITE ....................................................................... 65
Figure 37: READ With Auto Precharge ............................................................................................................ 66
Figure 38: READ Without Auto Precharge ....................................................................................................... 67
Figure 39: Single READ With Auto Precharge .................................................................................................. 68
Figure 40: Single READ Without Auto Precharge ............................................................................................. 69
Figure 41: WRITE With Auto Precharge Interrupted by a READ ....................................................................... 70
Figure 42: WRITE With Auto Precharge Interrupted by a WRITE ...................................................................... 70
Figure 43: WRITE With Auto Precharge .......................................................................................................... 71
Figure 44: WRITE Without Auto Precharge ..................................................................................................... 72
Figure 45: Single WRITE With Auto Precharge ................................................................................................ 73
Figure 46: Single WRITE Without Auto Precharge ........................................................................................... 74
Figure 47: Auto Refresh Mode ........................................................................................................................ 76
Figure 48: Self Refresh Mode ......................................................................................................................... 78
Figure 49: Power-Down Mode ....................................................................................................................... 79
Figure 50: Clock Suspend During WRITE Burst ............................................................................................... 81
List of Figures
PDF: 09005aef83ea581f
512mb_mobile_sdram_y67m.pdf – Rev. A 2/10 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
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