电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

IDT7MP4036S15Z

产品描述SRAM Module, 64KX32, 15ns, CMOS, ZIP-64
产品类别存储    存储   
文件大小96KB,共9页
制造商IDT (Integrated Device Technology)
下载文档 详细参数 选型对比 全文预览

IDT7MP4036S15Z概述

SRAM Module, 64KX32, 15ns, CMOS, ZIP-64

IDT7MP4036S15Z规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码ZIP
包装说明ZIP-64
针数64
Reach Compliance Codenot_compliant
ECCN代码3A991.B.2.A
最长访问时间15 ns
I/O 类型COMMON
JESD-30 代码R-XZMA-T64
JESD-609代码e0
内存密度2097152 bit
内存集成电路类型SRAM MODULE
内存宽度32
功能数量1
端口数量1
端子数量64
字数65536 words
字数代码64000
工作模式ASYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织64KX32
输出特性3-STATE
可输出YES
封装主体材料UNSPECIFIED
封装代码ZIP
封装等效代码ZIP64/68,.1,.1
封装形状RECTANGULAR
封装形式MICROELECTRONIC ASSEMBLY
并行/串行PARALLEL
峰值回流温度(摄氏度)NOT SPECIFIED
电源5 V
认证状态Not Qualified
座面最大高度12.7 mm
最大待机电流0.24 A
最小待机电流4.5 V
最大压摆率1.28 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式THROUGH-HOLE
端子节距1.27 mm
端子位置ZIG-ZAG
处于峰值回流温度下的最长时间NOT SPECIFIED

文档预览

下载PDF文档
64K x 32
CMOS Static RAM Module
Features
High-density 2MB Static RAM module
Low profile 64-pin ZIP (Zig-zag In-line vertical Package) or 64-
pin SIMM (Single In-line Memory Module)
Ultra fast access time: 12ns (max.)
Surface mounted plastic components on an epoxy laminate
(FR-4) substrate
Single 5V (±10%) power supply
Multiple GND pins and decoupling capacitors for maximum
noise immunity
Inputs/outputs directly TTL-compatible
IDT7MP4036
x
x
Description
The IDT7MP4036 is a 64K x 32 Static RAM module constructed on
an epoxy laminate (FR-4) substrate using eight 64K x 4 Static RAMs in
plastic SOJ packages. Availability of four chip select lines (one for each
group of two RAMs) provides byte access. Extremely fast speeds can be
achieved due to the use of 256K Static RAMs fabricated in IDT’s high-
performance, high-reliability CMOS technology. The IDT7MP4036 is
available with access time as fast as 12ns with minimal power consumption.
The IDT7MP4036 is packaged in a 64-pin FR-4 ZIP (Zig-zag In-line
vertical Package)or a 64-pin SIMM (Single In-line Memory Module). The
ZIP configuration allows 64 pins to be placed on a package 3.65 inches
long and 0.35 inches wide. At only 0.50 inches high, this low-profile
package is ideal for systems with minimum board spacing, while the SIMM
configuration allows use of edge mounted sockets to secure the module.
All inputs and outputs of the IDT7MP4036 are TTL-compatible and
operate from a single 5V supply. Full asynchronous circuitry requires no
clocks or refresh for operation and provides equal access and cycle times
for ease of use.
Two identification pins (PD
0
and PD
1
) are provided for applications in
which different density versions of the module are used. In this way, the
target system can read the respective levels of PD
0
and PD
1
to determine
a 64K depth.
x
x
x
x
x
Pin Configuration
(1)
1
PD
0
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
A
7
A
8
A
9
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
14
CS
1
CS
3
NC
GND
I/O
16
I/O
17
I/O
18
I/O
19
A
10
A
11
A
12
A
13
I/O
20
I/O
21
I/O
22
I/O
23
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
GND
PD
1
I/O
8
I/O
9
I/O
10
I/O
11
A
0
A
1
A
2
I/O
12
I/O
13
I/O
14
I/O
15
GND
A
15
CS
2
CS
4
NC
OE
I/O
24
I/O
25
I/O
26
I/O
27
A
3
A
4
A
5
V
CC
A
6
I/O
28
I/O
29
I/O
30
I/O
31
PD
0
– OPEN
PD
1
– GND
,
Pin Names
I/O
0-31
A
0-15
CS
1-4
WE
OE
PD
0-1
V
CC
GND
NC
Data Inputs/Outputs
Addresses
Chip Selects
Write Enable
Output Enable
Depth Identification
Power
Ground
No Connect
2682 tbl 01
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
2682 drw 02
ZIP, SIMM
Top View
NOTE:
1. Pins 2 and 3 (PD
0
and PD
1
) are read by the user to determine the density of
the module. If PD
0
reads Open and PD
1
reads GND, then the module had a
64K depth.
DECEMBER 1999
1
DSC-2682/6
©1999 Integrated Device Technology, Inc.

IDT7MP4036S15Z相似产品对比

IDT7MP4036S15Z IDT7MP4036S25Z IDT7MP4036S35Z IDT7MP4036S35M IDT7MP4036S15M IDT7MP4036S13Z IDT7MP4036S13M IDT7MP4036S20M IDT7MP4036S25M
描述 SRAM Module, 64KX32, 15ns, CMOS, ZIP-64 SRAM Module, 64KX32, 25ns, CMOS, ZIP-64 SRAM Module, 64KX32, 35ns, CMOS, ZIP-64 SRAM Module, 64KX32, 35ns, CMOS, SIMM-64 SRAM Module, 64KX32, 15ns, CMOS, SIMM-64 SRAM Module, 64KX32, 13ns, CMOS, ZIP-64 SRAM Module, 64KX32, 13ns, CMOS, SIMM-64 SRAM Module, 64KX32, 20ns, CMOS, SIMM-64 SRAM Module, 64KX32, 25ns, CMOS, SIMM-64
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 ZIP ZIP ZIP SIMM SIMM ZIP SIMM SIMM SIMM
包装说明 ZIP-64 ZIP-64 ZIP-64 SIMM-64 SIMM-64 ZIP-64 , SIMM-64 SIMM-64
针数 64 64 64 64 64 64 64 64 64
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant not_compliant compliant unknown not_compliant not_compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 15 ns 25 ns 35 ns 35 ns 15 ns 13 ns 13 ns 20 ns 25 ns
JESD-30 代码 R-XZMA-T64 R-XZMA-T64 R-XZMA-T64 R-XSMA-N64 R-XSMA-N64 R-XZMA-T64 R-XSMA-N64 R-XSMA-N64 R-XSMA-N64
内存密度 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit
内存集成电路类型 SRAM MODULE SRAM MODULE SRAM MODULE SRAM MODULE SRAM MODULE SRAM MODULE SRAM MODULE SRAM MODULE SRAM MODULE
内存宽度 32 32 32 32 32 32 32 32 32
功能数量 1 1 1 1 1 1 1 1 1
端子数量 64 64 64 64 64 64 64 64 64
字数 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words 65536 words
字数代码 64000 64000 64000 64000 64000 64000 64000 64000 64000
工作模式 ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
组织 64KX32 64KX32 64KX32 64KX32 64KX32 64KX32 64KX32 64KX32 64KX32
封装主体材料 UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 NO NO NO NO NO NO NO NO NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE NO LEAD NO LEAD THROUGH-HOLE NO LEAD NO LEAD NO LEAD
端子位置 ZIG-ZAG ZIG-ZAG ZIG-ZAG SINGLE SINGLE ZIG-ZAG SINGLE SINGLE SINGLE
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 - 不符合 不符合
I/O 类型 COMMON COMMON COMMON COMMON COMMON - - COMMON COMMON
JESD-609代码 e0 e0 e0 - - e0 e0 - e0
端口数量 1 1 1 1 1 - - 1 1
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE - - 3-STATE 3-STATE
可输出 YES YES YES YES YES - - YES YES
封装代码 ZIP ZIP ZIP SIMM SIMM - - SIMM SIMM
封装等效代码 ZIP64/68,.1,.1 ZIP64/68,.1,.1 ZIP64/68,.1,.1 SSIM64 SSIM64 - - SSIM64 SSIM64
峰值回流温度(摄氏度) NOT SPECIFIED 225 225 225 225 225 - 225 225
电源 5 V 5 V 5 V 5 V 5 V - - 5 V 5 V
座面最大高度 12.7 mm 12.7 mm 12.7 mm 13.462 mm 13.462 mm - - 13.462 mm 13.462 mm
最大待机电流 0.24 A 0.24 A 0.24 A 0.24 A 0.24 A - - 0.24 A 0.24 A
最小待机电流 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V - - 4.5 V 4.5 V
最大压摆率 1.28 mA 1.28 mA 1.28 mA 1.28 mA 1.28 mA - - 1.28 mA 1.28 mA
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - - Tin/Lead (Sn/Pb) TIN LEAD - TIN LEAD
端子节距 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm - - 1.27 mm 1.27 mm
处于峰值回流温度下的最长时间 NOT SPECIFIED 30 30 NOT SPECIFIED NOT SPECIFIED 30 - NOT SPECIFIED 30
瑞萨EZ-CUBE+DEMOR7F0C8021-TB试用文章一,二, 三
本帖最后由 damiaa 于 2014-10-21 09:51 编辑 文章一: 收到瑞萨的R7F0C802X EASYSTART了,跑起来了。 https://bbs.eeworld.com.cn/forum. ... 1&extra=#pid1764432 文章二: R7F0C802X ......
damiaa 瑞萨MCU/MPU
大家一起聊聊S3C2440A Block Diagram原理图的各个部件的组成,功能......
http://www.icdev.com.cn/attachments/2008/06/1833_200806170113221.jpg...
toff 嵌入式系统
FPGA的输出
FPGA的输出是3.3v 的,如果我需要实现的目标电压是 5V 的通过什么芯片进行保持啊!!...
yl675942236 FPGA/CPLD
什么是RS-485接口?它比RS-232-C接口相比有何特点?
答:由于RS-232-C接口标准出现较早,难免有不足之处,主要有以下四点: (1) 接口的信号电平值较高,易损坏接口电路的芯片,又因为与TTL 电平不兼容故需使用电平转换电路方能与TTL电路连接。 (2) 传 ......
aone2008 工业自动化与控制
想和贵站交互链接
我是飓风数字系的,我们的网址是http://www.cyclone.com.cn,网站建立时间不长,想和贵网站做个交互链接,互相宣传一下,不知斑竹意下如何/...
lydia1129 为我们提建议&公告
2407A最小系统板调试问题?
并口的仿真器要设置好计算机并口的工作模式。 请找一个好的板块对照操作下,比较容易发现问题, 如果还有问题请,联系我们公司最近的办事处。 ...
xag1980 微控制器 MCU

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 2574  362  2590  2860  2469  52  8  53  58  50 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved