a
FEATURES
Two Normally Open and Two Normally Closed SPST
Switches with Disable
Switches Can Be Easily Configured as a Dual SPDT or
a DPDT
Highly Resistant to Static Discharge Destruction
Higher Resistance to Radiation than Analog Switches
Designed with MOS Devices
Guaranteed R
ON
Matching: 10% max
Guaranteed Switching Speeds
T
ON
= 500 ns max
T
OFF
= 400 ns max
Guaranteed Break-Before-Make Switching
Low “ON” Resistance: 80 max
Low R
ON
Variation from Analog Input Voltage: 5%
Low Total Harmonic Distortion: 0.01%
Low Leakage Currents at High Temperature
T
A
= +125 C: 100 nA max
T
A
= +85 C: 30 nA max
Digital Inputs TTL/CMOS Compatible and Independent
of V+
Improved Specifications and Pin Compatible to
LF-11333/13333
Dual or Single Power Supply Operation
Available in Die Form
1
Quad SPST JFET
Analog Switch
SW06
FUNCTIONAL BLOCK DIAGRAM
V+
12
3
IN 1
S1
2
6
IN 2
8
LEVEL
SHIFT
7
11
IN 3
9
10
14
IN 4
16
15
4
DIS
13
GND
V–
5
D1
S2
D2
S3
D3
S4
D4
GENERAL DESCRIPTION
The SW06 is a four channel single-pole, single-throw analog
switch that employs both bipolar and ion-implanted FET
devices. The SW06 FET switches use bipolar digital logic inputs
which are more resistant to static electricity than CMOS devices.
Ruggedness and reliability are inherent in the SW06 design and
construction technology.
Increased reliability is complemented by excellent electrical
specifications. Potential error sources are reduced by minimizing
“ON” resistance and controlling leakage currents at high tem-
peratures. The switching FET exhibits minimal R
ON
variation
over a 20 V analog signal range and with power supply voltage
changes. Operation from a single positive power supply voltage
is possible. With V+ = 36 V, V– = 0 V, the analog signal range
will extend from ground to +32 V.
PNP logic inputs are TTL and CMOS compatible to allow the
SW06 to upgrade existing designs. The logic “0” and logic “1”
input currents are at microampere levels reducing loading on
CMOS and TTL logic.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
SW06–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ V+ = +15 V, V– = –15 V and T = +25 C, unless otherwise noted)
A
Parameter
“ON” RESISTANCE
Symbol
R
ON
R
ON
Match
V
A
I
A
∆R
ON
I
S(OFF)
I
D(OFF)
I
S(ON)+
I
D(ON)
V
INH
V
INL
I
INH
I
INL
t
ON
t
OFF
t
ON
–t
OFF
C
S(OFF)
C
D(OFF)
C
D(ON)+
C
S(ON)
I
SO(OFF)
C
T
Conditions
V
S
= 0 V, I
S
= 1 mA
V
S
=
±
10 V, I
S
= 1 mA
V
S
= 0 V, I
S
= 100
µA
1
I
S
= 1 mA
2
I
S
= 1 mA
2
V
S
=
±
10 V
–10 V
≤
V
S
≤
10 V, I
S
= 1.0 mA
V
S
= 10 V, V
D
= –10 V
3
V
S
= 10 V, V
D
= –10 V
3
V
S
= V
D
=
±
10 V
3
Full Temperature Range
2, 4
Full Temperature Range
2, 4
V
IN
= 2.0 V to 15.0 V
5
V
IN
= 0.8 V
See Switching Time
Test Circuit
4, 6
See Switching Time
Test Circuit
4, 6
Note 7
V
S
= 0 V
3
V
S
= 0 V
3
V
S
= V
D
= 0 V
3
V
S
= 5 V rms, R
L
= 680
Ω,
C
L
= 7 pF, f = 500 kHz
3
V
S
= 5 V rms, R
L
= 680
Ω,
C
L
= 7 pF, f = 500 kHz
3
All Channels “OFF”,
DIS = “0”
3
All Channels “OFF”,
DIS = “0”
3
All Channels “ON” or
“OFF”
3
SW06B
Min Typ Max
60
65
5
+10 +11
–10 –15
10
15
5
15
80
80
10
SW06F
Min Typ Max
60
65
5
+10 +11
–10 –15
7
12
10
20
100
100
20
SW06G
Min Typ Max
100
100
150
150
20
+10 +11
–10 –15
5
10
10
20
Units
Ω
%
V
R
ON
MATCH BETWEEN SWITCHES
ANALOG VOLTAGE RANGE
ANALOG CURRENT RANGE
∆R
ON
VS. APPLIED VOLTAGE
SOURCE CURRENT IN
“OFF” CONDITION
DRAIN CURRENT IN
“OFF” CONDITION
SOURCE CURRENT IN
“ON” CONDITION
LOGICAL “1” INPUT VOLTAGE
LOGICAL “0” INPUT VOLTAGE
LOGICAL “1” INPUT CURRENT
LOGICAL “0” INPUT
TURN-ON TIME
mA
%
0.3
2.0
0.3
2.0
0.3
10
nA
0.3
0.3
2.0
2.0
0.3
0.3
2.0
2.0
0.3
0.3
10
10
nA
nA
2.0
0.8
5
1.5
340
5.0
500
2.0
0.8
5
1.5
5.0
2.0
0.8
10
1.5
340
10.0
700
V
V
µA
µA
ns
340 600
TURN-OFF TIME
200
400
200 400
200
500
ns
BREAK-BEFORE-MAKE TIME
SOURCE CAPACITANCE
DRAIN CAPACITANCE
CHANNEL “ON” CAPACITANCE
50
140
7.0
5.5
15
50
140
7.0
5.5
15
50
140
7.0
5.5
15
ns
pF
pF
pF
“OFF” ISOLATION
58
58
58
dB
CROSSTALK
70
70
70
dB
POSITIVE SUPPLY CURRENT
I+
5.0
6.0
5.0
9.0
6.0
9.0
mA
NEGATIVE SUPPLY CURRENT
I–
3.0
5.0
4.0
7.0
4.0
7.0
mA
GROUND CURRENT
I
G
3.0
4.0
3.0
4.0
3.0
5.0
mA
–2–
REV. A
SW06
ELECTRICAL CHARACTERISTICS
Parameter
TEMPERATURE RANGE
“ON” RESISTANCE
Symbol
T
A
R
ON
(@ V+ = +15 V, V– = –15 V, –55 C
≤
T
A
≤
+125 C for SW06BQ, –40 C
≤
T
A
≤
+85 C for
SW06FQ and –40 C
≤
T
A
≤
+85 C for SW06GP/GS, unless otherwise noted)
Conditions
Operating
V
S
= 0 V, I
S
= 1.0 mA
V
S
=
±
10 V, I
S
= 1.0 mA
V
S
= 0 V, I
S
= 100
µA
1
I
S
= 1.0 mA
2
I
S
= 1.0 mA
2
V
S
=
±
10 V
–10 V
≤
V
S
≤
10 V, I
S
= 1.0 mA
V
S
= 10 V, V
D
= –10 V
T
A
= Max Operating Temp
3, 9
V
S
= 10 V, V
D
= –10 V
T
A
= Max Operating Temp
3, 9
V
S
= V
D
=
±
10 V
T
A
= Max Operating Temp
3, 9
V
IN
= 2.0 V to 15.0 V
5
V
IN
= 0.8 V
See Switching Time
Test Circuit
4, 8
See Switching Time
Test Circuit
4, 8
Note 7
All Channels “OFF,”
DIS = “0”
3
All Channels “OFF,”
DIS = “0”
3
All Channels “ON” or
“OFF”
3
4
440
SW06B
Min Typ Max
–55
75
80
6
+10 +11
–10 –15
7
12
10
SW06F
Min Typ Max
+85
75
80
6
+10 +11
–10 –15
5
11
12
125
125
25
SW06G
Min Typ Max
0
75
80
10
+10 +11
–10 –15
11
15
70
175
175
Units
°C
Ω
%
V
+125 –25
110
110
20
∆R
ON
MATCH BETWEEN SWITCHES R
ON
Match
ANALOG VOLTAGE RANGE
V
A
I
A
∆R
ON
ANALOG CURRENT RANGE
∆R
ON
WITH APPLIED VOLTAGE
SOURCE CURRENT IN
“OFF” CONDITION
DRAIN CURRENT IN
“OFF” CONDITION
mA
%
I
S(OFF)
I
D(OFF)
I
S(ON)+
I
D(ON)
I
INH
I
INL
t
ON
t
OFF
t
ON
–t
OFF
I+
60
30
60
nA
60
30
60
nA
LEAKAGE CURRENT IN
“ON” CONDITION
LOGICAL “1” INPUT CURRENT
LOGICAL “0” INPUT CURRENT
TURN-ON TIME
100
30
60
nA
µA
µA
ns
10
10
900
4
10
10
5
15
15
1000
500 900
TURN-OFF TIME
300
500
330 500
500
ns
BREAK-BEFORE-MAKE TIME
POSITIVE SUPPLY CURRENT
70
9.0
70
13.5
50
13.5
ns
mA
NEGATIVE SUPPLY CURRENT
I–
7.5
10.5
10.5
mA
GROUND CURRENT
I
G
6.0
7.5
7.5
mA
NOTES
1
2
3
V
S
= 0 V, I
S
= 100
µA.
Specified as a percentage of R
AVERAGE
where: R
AVERAGE
=
R
ON1
+
R
ON2
+
R
ON
3
+
R
ON
4
.
4
Guaranteed by R
ON
and leakage tests. For normal operation maximum analog signal voltages should be restricted to less than (V+) –4 V.
Switch being tested ON or OFF as indicated, V
INH
= 2.0 V or V
INL
= 0.8 V, per logic truth table.
4
Also applies to disable pin.
5
Current tested at V
IN
= 2.0 V. This is worst case condition.
6
Sample tested.
7
Switch is guaranteed by design to provide break-before-make operation.
8
Guaranteed by design.
9
Parameter tested only at T
A
= +125°C for military grade device.
Specifications subject to change without notice.
REV. A
–3–
SW06
WAFER TEST LIMITS
(@ V+ = +15 V, V– = –15 V, T = +25 C, unless otherwise noted)
A
Parameter
“ON” RESISTANCE
R
ON
MATCH BETWEEN SWITCHES
∆R
ON
VS. V
A
POSITIVE SUPPLY CURRENT
NEGATIVE SUPPLY CURRENT
GROUND CURRENT
ANALOG VOLTAGE RANGE
LOGIC “1” INPUT VOLTAGE
LOGIC “0” INPUT VOLTAGE
LOGIC “0” INPUT CURRENT
LOGIC “1” INPUT CURRENT
ANALOG CURRENT RANGE
Symbol
R
ON
R
ON
Match
∆R
ON
I+
I–
I
G
V
A
V
INH
V
INL
I
INL
I
INH
I
A
Conditions
–10 V
≤
V
A
≤
10 V, I
S
≤
1 mA
V
A
= 0 V, I
S
≤
100
µA
–10 V
≤
V
A
≤
10 V, I
S
≤
1 mA
Note 1
Note 1
Note 1
I
S
= 1 mA
Note 2
Note 2
0 V
≤
V
IN
≤
0.8 V
2.0 V
≤
V
IN
≤
15 V
3
V
S
=
±
10 mV
SW06N
Limit
80
15
10
6.0
5.0
4.0
±
10.0
2.0
0.8
5.0
5
10
SW06G
Limit
100
20
20
9.0
7.0
4.0
±
10.0
2.0
0.8
5.0
5
7
Units
Ω
max
% max
% max
mA max
mA max
mA max
V min
V min
V max
µA
max
µA
max
mA min
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS
(@ V+ = +15 V, V– = –15 V, T = +25 C, unless otherwise noted)
A
Parameter
“ON” RESISTANCE
TURN-ON TIME
TURN-OFF TIME
DRAIN CURRENT IN
“OFF” CONDITION
“OFF” ISOLATION
CROSSTALK
Symbol
R
ON
t
ON
t
OFF
I
D(OFF)
I
SO(OFF)
C
T
Conditions
–10 V
≤
V
A
≤
10 V, I
S
≤
1 mA
SW06N
Typical
60
340
200
SW06G
Typical
60
340
200
0.3
58
70
Units
Ω
ns
ns
nA
dB
dB
V
S
= 10 V, V
D
= –10 V
f = 500 kHz, R
L
= 680
Ω
f = 500 kHz, R
L
= 680
Ω
0.3
58
70
NOTES
1
Power supply and ground current specified for switch “ON” or “OFF.”
2
Guaranteed by R
ON
and leakage tests.
3
Current tested at V
IN
= 2.0 V. This is worst case condition.
–4–
REV. A
SW06
ABSOLUTE MAXIMUM RATINGS
1
ORDERING GUIDE
Operating Temperature Range
SW06BQ, BRC . . . . . . . . . . . . . . . . . . . –55°C to +125°C
SW06FQ . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
SW06GP, GS . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . +150°C
V+ Supply to V– Supply . . . . . . . . . . . . . . . . . . . . . . . +36 V
V+ Supply to Ground . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
Logic Input Voltage . . . . . . . . . . . (–4 V or V–) to V+ Supply
Analog Input Voltage Range
Continuous . . . . . . . . . . . . . V– Supply to V+ Supply +20 V
Maximum Current Through
Any Pin Including Switch . . . . . . . . . . . . . . . . . . . . . 30 mA
Package Type
16-Pin Hermetic DIP (Q)
16-Pin Plastic DIP (P)
20-Contact LCC (RC)
16-Pin SOL (S)
2
JA
JC
Model
SW06BQ
SW06BRC
SW06FQ
SW06GP
SW06GS
Temperature
Range
–55°C to +125°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package
Description
Cerdip
LCC
Cerdip
Plastic DIP
SOL
Package
Option
Q-16
E-20A
Q-16
N-16
R-16
TRUTH TABLE
Disable
Input
0
1 or NC
1 or NC
Logic
Input
X
0
1
Switch State
Channels
Channels
1&2
3&4
OFF
OFF
ON
OFF
ON
OFF
Units
°C/W
°C/W
°C/W
°C/W
100
82
98
98
16
39
38
30
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
θ
JA
is specified for worst case mounting conditions, i.e.,
θ
JA
is specified for device
in socket for Cerdip, P-DIP, and LCC packages;
θ
JA
is specified for device soldered
to printed circuit board for SO package.
PIN CONNECTIONS
16-Pin DIP (Q or P-Suffix)
16-Pin SOL (S-Suffix)
DICE CHARACTERISTICS
Die Size 0.101
×
0.097 inch, 9797 sq. mils
(2.565
×
2.464 mm, 6320 sq. mm)
SW06BRC/883
LCC Package
(RC-Suffix)
REV. A
–5–
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