IRF3610SPbF
HEXFET
®
Power MOSFET
D
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
G
S
V
DSS
R
DS(on)
typ.
max.
I
D
100V
9.3mΩ
11.6m
Ω
103A
D
S
G
D
2
Pak
IRF3610SPbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
103
73
410
333
2.2
± 20
23
-55 to + 175
300 (1.6mm from case)
Units
A
W
W/°C
V
V/ns
°C
d
f
Avalanche Characteristics
E
AS
I
AR
E
AR
Single Pulse Avalanche Energy (Thermally Limited)
Avalanche Current
Repetitive Avalanche Energy
Ã
d
Thermal Resistance
Symbol
R
θJC
R
θJA
460
See Fig. 14, 15, 22a, 22b
mJ
A
mJ
Junction-to-Case
Junction-to-Ambient (PCB Mount)
jk
Parameter
Typ.
Max.
0.50
40
Units
°C/W
i
–––
–––
1
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IRF3610SPbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
gfs
R
G
I
DSS
I
GSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Internal Gate Resistance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
100
–––
–––
2.0
110
–––
–––
–––
–––
–––
–––
0.10
9.3
–––
–––
2.2
–––
–––
–––
–––
–––
–––
11.6
4.0
–––
–––
20
250
200
-200
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1.0mA
mΩ V
GS
= 10V, I
D
= 62A
V V
DS
= V
GS
, I
D
= 250µA
S V
DS
= 25V, I
D
= 62A
Ω
µA V
DS
= 100V, V
GS
= 0V
V
DS
= 100V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
f
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
100
23
42
58
15
55
77
43
5380
690
100
560
750
150
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
nC
Conditions
I
D
= 62A
V
DS
=50V
V
GS
= 10V
I
D
= 62A, V
DS
=0V, V
GS
= 10V
V
DD
= 65V
I
D
= 62A
R
G
= 2.7Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 80V , See Fig. 11
V
GS
= 0V, V
DS
= 0V to 80V
f
f
ns
pF
h
g
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
–––
–––
103
410
A
A
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
Ãd
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
––– –––
1.3
V
––– 110 –––
ns
––– 120 –––
––– 570 –––
nC
T
J
= 125°C
––– 710 –––
––– -9.5 –––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 62A, V
GS
= 0V
V
R
= 85V,
T
J
= 25°C
T
J
= 125°C
I
F
= 62A
di/dt = 100A/µs
T
J
= 25°C
f
f
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.24mH
R
G
= 50Ω, I
AS
= 62A, V
GS
=10V. Part not recommended for use
above this value.
I
SD
≤
62A, di/dt
≤
1935A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging
time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom-
R
θ
is measured at T
J
approximately 90°C.
R
θJC
value shown is at time zero.
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
mended footprint and soldering techniques refer to application note #AN-994.
2
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March 26, 2014
IRF3610SPbF
1000
TOP
VGS
15V
10V
6.0V
5.0V
4.7V
4.5V
4.2V
4.0V
1000
TOP
VGS
15V
10V
6.0V
5.0V
4.7V
4.5V
4.2V
4.0V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
4.0V
1
4.0V
≤
60µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
1
0.1
1
≤
60µs PULSE WIDTH
Tj = 175°C
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
3.0
ID = 62A
2.5
VGS = 10V
ID, Drain-to-Source Current (A)
100
T J = 175°C
2.0
10
TJ = 25°C
1.5
1
VDS = 50V
≤60µs
PULSE WIDTH
0.1
2
3
4
5
6
7
8
9
10
11
1.0
0.5
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
14.0
ID= 62A
VGS, Gate-to-Source Voltage (V)
12.0
10.0
8.0
6.0
4.0
2.0
0.0
10000
C, Capacitance (pF)
Ciss
1000
Coss
VDS= 80V
VDS= 50V
VDS= 20V
Crss
100
10
1
10
VDS, Drain-to-Source Voltage (V)
100
0
20
40
60
80
100
120
140
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
3
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Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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IRF3610SPbF
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
100
T J = 175°C
100
100µs
10
T J = 25°C
10
1ms
1
VGS = 0V
1.0
0.0
0.5
1.0
1.5
2.0
VSD, Source-to-Drain Voltage (V)
0.1
1
Tc = 25°C
Tj = 175°C
Single Pulse
10
3ms
10ms
DC
100
1000
Fig 7.
Typical Source-Drain Diode
Forward Voltage
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
120
100
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
125
ID = 1.0mA
120
115
110
105
100
95
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
VDS , Drain-toSource Voltage (V)
80
60
40
20
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
3.5
3.0
2.5
EAS , Single Pulse Avalanche Energy (mJ)
Fig 10.
Drain-to-Source Breakdown Voltage
2000
ID
TOP
13A
27A
BOTTOM 62A
1600
Energy (µJ)
2.0
1.5
1.0
0.5
0.0
0
20
40
60
80
100
120
1200
800
400
0
25
50
75
100
125
150
175
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 11.
Typical C
OSS
Stored Energy
4
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Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
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March 26, 2014
IRF3610SPbF
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
1
0.0001
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance Junction-to-Case
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
100
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τj
= 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs. Pulse Width
500
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 62A
EAR , Avalanche Energy (mJ)
400
300
200
100
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 13, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
175
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
5
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March 26, 2014
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