OBSOLETE 3/1/95
MT5C2568
32K x 8 SRAM
SRAM
FEATURES
• High speed: 10, 12, 15, 20 and 25
• High-performance, low-power, CMOS double-metal
process
• Single +5V
±10%
power supply
• Easy memory expansion with
/
C
/
E and
/
O
/
E options
• All inputs and outputs are TTL-compatible
32K x 8 SRAM
PIN ASSIGNMENT (Top View)
28-Pin DIP
(SA-4)
A14
A12
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CE
DQ8
DQ7
DQ6
DQ5
DQ4
28-Pin SOJ
(SD-2)
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CE
DQ8
DQ7
DQ6
DQ5
DQ4
OPTIONS
• Timing
10ns access
12ns access
15ns access
20ns access
25ns access
• Packages
Plastic DIP (300 mil)
Plastic SOJ (300 mil)
• 2V data retention (optional)
• Low power (optional)
MARKING
-10
-12
-15
-20
-25
None
DJ
L
P
None
IT
AT
XT
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
DQ3
Vss
• Temperature
Commercial (0°C to +70°C)
Industrial
(-40°C to +85°C)
Automotive (-40°C to +125°C)
Extended
(-55°C to +125°C)
• Part Number Example: MT5C2568DJ-20 L
NOTE: Not all combinations of operating temperature, speed, data retention
and low power are necessarily available. Please contact the factory for availabil-
ity of specific part number combinations.
GENERAL DESCRIPTION
The MT5C2568 is organized as a 32,768 x 8 SRAM using
a four-transistor memory cell with a high-speed, low-power
CMOS process. Micron SRAMs are fabricated using double-
layer metal, double-layer polysilicon technology.
For flexibility in high-speed memory applications,
Micron offers chip enable (/C
/
E) and output enable (?O
/
E) with
this organization. These enhancements can place the out-
puts in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (?W
/
E) and
/
C
/
E inputs are both LOW. Reading is
accomplished when
?
W
/
E remains HIGH and
/
C
/
E and
?
O
/
E go
LOW. The device offers a reduced power standby mode
MT5C2568
Rev. 2/95
when disabled. This allows system designers to meet low
standby power requirements.
The “P” version provides a reduction in both operating
current (I
CC
) and TTL standby current (I
SB
1
). The latter is
achieved through the use of gated inputs on the
?
W
/
E,
?
O
/
E and
address lines, which also facilitates the design of battery
backed systems. That is, the gated inputs simplify the
design effort and circuitry required to protect against inad-
vertent battery current drain during power-down, when
inputs may be at undefined levels.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL-compatible.
1
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1995,
Micron Semiconductor, Inc.
OBSOLETE 3/1/95
MT5C2568
32K x 8 SRAM
FUNCTIONAL BLOCK DIAGRAM
Vcc
GND
A
DQ8
A
ROW DECODER
A
A
262,144-BIT
MEMORY ARRAY
I/O CONTROL
A
DQ1
A
A
CE
A
(LSB)
OE
WE
COLUMN DECODER
(LSB)
POWER
DOWN
A
A
A
A
A
A
A
TRUTH TABLE
MODE
STANDBY
READ
NOT SELECTED
WRITE
/
O
/
E
X
L
H
X
/
C
/
E
H
L
L
L
?
W
/
E
X
H
H
L
DQ
HIGH-Z
Q
HIGH-Z
D
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
MT5C2568
Rev. 2/95
2
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1995,
Micron Semiconductor, Inc.
OBSOLETE 3/1/95
MT5C2568
32K x 8 SRAM
ABSOLUTE MAXIMUM RATINGS*
Voltage on V
CC
Supply Relative to V
SS
.............. -1V to +7V
Storage Temperature (plastic) .................... -55°C to +150°C
Short Circuit Output Current ..................................... 50mA
Voltage on Any Pin Relative to V
SS
............ -1V to V
CC
+1V
Junction Temperature** ............................................. +150°C
*Stresses greater than those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect reliability.
**Maximum junction temperature depends upon package
type, cycle time, loading, ambient temperature and airflow.
See technical note TN-05-14 for more information.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(0°C
≤
T
A
≤
70°C; Vcc = 5V
±10%)
DESCRIPTION
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Supply Voltage
0V
≤
V
IN
≤
V
CC
Output(s) disabled
0V
≤
V
OUT
≤
V
CC
I
OH
= -4.0mA
I
OL
= 8.0mA
CONDITIONS
SYMBOL
V
IH
V
IL
IL
I
IL
O
V
OH
V
OL
V
CC
4.5
MIN
2.2
-0.5
-5
-5
2.4
0.4
5.5
MAX
V
CC
+1
0.8
5
5
UNITS
V
V
µA
µA
V
V
V
1
1
1
NOTES
1
1, 2
MAX
DESCRIPTION
Power Supply
Current: Operating
CONDITIONS
/
C
/
E
≤
V
IL
; V
CC
= MAX
f = MAX = 1/
t
RC
outputs open
P version
Power Supply
Current: Standby
/
C
/
E
≥
V
IH
; V
CC
= MAX
f = MAX = 1/
t
RC
outputs open
P version
/
C
/
E
≥
V
CC
-0.2V; V
CC
= MAX
V
IN
≤
V
SS
+0.2V or
V
IN
≥
V
CC
-0.2V; f = 0
P version
†
P
SYMBOL
I
CC
I
CC
I
SB
1
I
SB
1
I
SB
2
I
SB
2
TYP
130
100
24
1.4
0.6
0.4
-10
†
200
-
55
-
5
-
-12
†
180
-
50
-
5
-
-15
†
165
140
45
4
5
3
-20
150
125
40
4
5
3
-25
140
120
35
4
5
3
UNITS NOTES
mA
mA
mA
mA
mA
mA
3, 13
3, 13
13
13
13
13
version not available with this speed.
MT5C2568
Rev. 2/95
3
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1995,
Micron Semiconductor, Inc.
OBSOLETE 3/1/95
MT5C2568
32K x 8 SRAM
CAPACITANCE
DESCRIPTION
Input Capacitance
Output Capacitance
CONDITIONS
T
A
= 25°C; f = 1 MHz
V
CC
= 5V
SYMBOL
C
I
C
O
MAX
6
6
UNITS
pF
pF
NOTES
4
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (0°C
≤
T
A
≤
70°C; V
CC
= 5V
±10%)
DESCRIPTION
READ Cycle
READ cycle time
Address access time
Chip Enable access time
Output hold from address change
Chip Enable to output in Low-Z
Chip disable to output in High-Z
Chip Enable to power-up time
Chip disable to power-down time
Output Enable access time
Output Enable to output in Low-Z
Output disable to out put in High-Z
WRITE Cycle
WRITE cycle time
Chip Enable to end of write
Chip Enable to end of write
(P and LP version)
Address valid to end of write
Address valid to end of write
(P and LP version)
Address setup time
Address hold from end of write
WRITE pulse width
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-Z
Write Enable to output in High-Z
SYM
t
RC
t
AA
t
ACE
t
OH
t
LZCE
t
HZCE
t
PU
t
PD
t
AOE
t
LZOE
t
HZOE
t
WC
t
CW
t
CW
t
AW
t
AW
t
AS
t
AH
t
WP1
t
WP2
t
DS
t
DH
t
LZWE
t
HZWE
-10
MIN MAX
10
10
10
3
3
5
0
10
5
0
5
10
7
-
7
-
0
1
7
10
6
0
2
5
-12
MIN MAX
12
12
12
3
3
6
0
12
6
0
6
12
8
-
8
-
0
1
8
12
7
0
2
6
-15
MIN MAX
15
15
15
3
3
8
0
15
8
0
6
15
10
12
10
12
0
1
10
12
7
0
2
7
-20
MIN MAX
20
20
20
3
3
9
0
20
8
0
7
20
12
12
12
12
0
1
12
15
10
0
2
8
-25
MIN MAX UNITS NOTES
25
25
25
3
3
9
0
25
8
0
7
25
15
15
15
15
0
1
15
15
10
0
2
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
6, 7
4
4
6
7
6, 7
MT5C2568
Rev. 2/95
4
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1995,
Micron Semiconductor, Inc.
OBSOLETE 3/1/95
MT5C2568
32K x 8 SRAM
INDUSTRIAL TEMPERATURE SPECIFICATIONS (IT)
The following specifications are to be used for Industrial Temperature (IT) MT5C2568 SRAMs.
(-40°C
≤
T
A
≤
85°C)
MAX
DESCRIPTION
Power Supply
Current: Operating
Power Supply
Current: Standby
CONDITIONS
/
C
/
E
≤
V
IL
; V
CC
= MAX
f = MAX = 1/
t
RC
outputs open
/
C
/
E
≥
V
IH
; V
CC
= MAX
f = MAX = 1/
t
RC
outputs open
/
C
/
E
≥
V
CC
-0.2V; V
CC
= MAX
V
IN
≤
V
SS
+0.2V or
V
IN
≥
V
CC
-0.2V; f = 0
SYMBOL
I
CC
-10
210
-12
190
-15
170
-20
160
-25
150
UNITS NOTES
mA
3
I
SB
1
65
60
50
45
40
mA
I
SB
2
6
6
6
6
6
mA
DATA RETENTION ELECTRICAL CHARACTERISTICS (L version only)
DESCRIPTION
Data Retention Current
CONDITIONS
/
C
/
E
≥
(Vcc -0.2V)
V
IN
≥
(V
CC
-0.2V)
or
≤
0.2V
V
CC
= 2V
V
CC
= 3V
SYMBOL
I
CCDR
I
CCDR
MAX
400
600
UNITS
µA
µA
NOTES
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
Refer to commercial temperature timing parameters for specifications not listed here.
(Notes 5, 13) (-40°C
≤
T
A
≤
85°C)
DESCRIPTION
READ Cycle
Output hold from address change
Chip Enable to output in Low-Z
WRITE Cycle
Address hold from end of write
SYM
t
OH
t
LZCE
t
AH
-12
MIN MAX
2
2
2
-15
MIN MAX
2
2
2
-20
MIN MAX
2
2
2
-25
MIN MAX
2
2
2
UNITS NOTES
ns
ns
ns
7
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-40°C
≤
T
A
≤
85°C)
DESCRIPTION
Input High (Logic 1) Voltage
CONDITIONS
SYMBOL
V
IH
MIN
2.3
MAX
V
CC
+1
UNITS
V
NOTES
1
MT5C2568
Rev. 2/95
5
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1995,
Micron Semiconductor, Inc.
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