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SN54ALS74A, SN54AS74, SN74ALS74A, SN74AS74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET
SDAS143A – D2661, APRIL 1982 – REVISED SEPTEMBER 1987
•
•
Package Options Include Plastic Small
Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and
Ceramic 300-mil DIPs
Dependable Texas instruments Quality
and Reliability
TYPE
’ALS74A
’AS74
TYPICAL MAXIMUM
CLOCK FREQUENCY
(CL = 50 pF)
50 MHz
134 MHz
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
6 mW
26 mW
SN54ALS74A, SN54AS74 . . . J PACKAGE
SN74ALS74A, SN74AS74 . . . D OR N PACKAGE
(TOP VIEW)
1CLR
1D
1CLK
1PRE
1Q
1Q
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
2CLR
2D
2CLK
2PRE
2Q
2Q
description
These devices contain two independent D-type
positive-edge triggered flip-flops. A low level at the
Preset or Clear inputs sets or resets the outputs
regardless of the levels of the other inputs. When
Preset and Clear are inactive (high), data at the D
input meeting the setup time requirements are
transferred to the outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at
a voltage level and is not directly related to the rise
time of the clock pulse. Following the hold time
interval, data at the D input may be changed
without affecting the levels at the outputs.
The SN54ALS74A and SN54AS74 are
characterized for operation over the full military
temperature range of – 55°C to 125°C. The
SN74ALS74A and SN74AS74 are characterized
for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
PRESET
L
H
L
H
H
H
CLEAR
H
L
L
H
H
H
CLOCK
X
X
X
↑
↑
L
D
X
X
X
H
L
X
OUTPUTS
Q
H
L
H†
H
L
QO
Q
L
H
H†
L
H
QO
SN54ALS74A, SN54AS74 . . . FK PACKAGE
(TOP VIEW)
1CLK
NC
1PRE
NC
1Q
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1D
1CLR
NC
VCC
2CLR
2D
NC
2CLK
NC
2PRE
NC – No internal connection
logic symbol
‡
1PRE
1CLK
1D
1CLR
2PRE
2CLK
2D
2CLR
4
3
2
1
10
11
12
13
9
2Q
S
C1
1D
R
6
1Q
5
1Q
1Q
GND
NC
2Q
2Q
8
2Q
† The output levels in this configuration are not guaranteed
to meet the minimum levels for VOH if the lows at Preset and
Clear are near VIL maximum. Furthermore, this
configuration is nonstable; that is, it will not persist when
Preset or Clear; returns to their inactive (high) level.
‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1987, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
SN54ALS74A, SN54AS74, SN74ALS74A, SN74AS74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET
SDAS143A – D2661, APRIL 1982 – REVISED SEPTEMBER 1987
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range: SN54ALS74A, SN54ALS74 . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS74A, SN74ALS74 . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
recommended operating conditions
SN54AS74
MIN
VCC
VIH
VIL
IOH
IOL
fclock
tw
Supply voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
PRE or CLR low
Pulse duration
CLK high
CLK low
tsu
Setup time before CLK↑
Data
PRE or CLR inactive
0
15
16.5
16.5
15
10
4.5
2
0.8†
0.7‡
– 0.4
4
25
0
15
14.5
14.5
15
10
ns
ns
– 0.4
8
34
NOM
5
MAX
5.5
SN74AS74
MIN
4.5
2
0.8
V
mA
mA
MHz
NOM
5
MAX
5.5
UNIT
V
V
th
Hold time, data after CLK↑
0
0
ns
TA
Operating free-air temperature
– 55
125
0
70
°C
† Tested at – 55°C to 70°C.
‡ Tested at 70°C 125°C, per MIL-STD-883, method 5005, sub-group 1, 2, and 3. Static tests are performed at 25°C, 125°C, and – 55°C.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
VOL
CLK or D
II
IIH
IIL
PRE or CLR
CLK or D
PRE or CLR
CLK or D
PRE or CLR
VCC = 4.5 V
4 5 V,
VI = 0 4 V
0.4
VCC = 4.5 V
4 5 V,
VI = 2 7 V
2.7
VCC = 4.5 V
4 5 V,
VI = 7 V
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
VCC = 4.5 V,
VCC = 4.5 V,
II = – 18 mA
IOH = – 2mA
IOL = 4 mA
IOL = 8 mA
SN54AS74
MIN
TYP§
VCC – 2
0.25
0.4
0.1
0.2
20
40
– 0.2
– 0.4
MAX
SN74AS74
MIN
TYP§
–1.2
VCC – 2
0.25
0.35
0.4
0.5
0.1
0.2
20
40
– 0.2
– 0.4
mA
mA
µA
A
MAX
–1.5
UNIT
V
V
V
IO¶
VCC = 5.5 V,
VO = 2.25 V
– 30
–112
– 30
–112
mA
ICC
VCC = 5.5 V,
See Note 1
2.4
4
2.4
4
mA
§ All typical values are at VCC = 5 V, TA = 25°C.
¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded.
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SN54ALS74A, SN74ALS74A
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET
SDAS143A – D2661, APRIL 1982 – REVISED SEPTEMBER 1987
switching characteristics (see Note 2)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
Ω,
TA = MIN TO MAX†
SN54ALS74A
MIN
fmax
tPLH
tPHL
tPLH
25
3
PRE or CLR
CLK
Q or Q
Q or Q
5
5
13.5
17
17
MAX
SN74ALS74A
MIN
34
3
5
5
5
13
15
16
18
MAX
MHz
ns
ns
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
UNIT
tPHL
5
18
† For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuit and voltage waveforms are shown in Section 1 of the
ALS/AS Logic Data Book,
1986.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SN54AS74, SN74AS74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED
FLIP-FLOPS WITH CLEAR AND PRESET
SDAS143A – D2661, APRIL 1982 – REVISED SEPTEMBER 1987
recommended operating conditions
SN54AS74
MIN
VCC
VIH
VIL
IOH
IOL
fclock
tw
Supply voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
PRE or CLR low
Pulse duration
CLK high
CLK low
Data
tsu
th
TA
Setup time before CLK↑
Hold time, data after CLK↑
Operating free-air temperature
PRE or CLR inactive
0
4
4
5.5
4.5
2
0
– 55
125
4.5
2
0.8
–2
20
90
0
4
4
5.5
4.5
2
0
0
70
ns
ns
°C
ns
NOM
5
MAX
5.5
SN74AS74
MIN
4.5
2
0.8
–2
20
105
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
MHz
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
CLK or D
IIH
IIL
PRE or CLR
CLK or D
PRE or CLR
VCC = 5.5 V
5 5 V,
VI = 0 4 V
0.4
VCC = 5.5 V
5 5 V,
VI = 2 7 V
2.7
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
VCC = 4.5 V,
VCC = 5.5 V,
II = – 18 mA
IOH = – 2mA
IOL = 20 mA
VI = 7 V
SN54AS74
MIN
TYP†
VCC – 2
0.25
0.5
0.1
20
40
– 0.5
– 1.8
MAX
SN74AS74
MIN
TYP†
–1.2
VCC – 2
0.25
0.5
0.1
20
40
– 0.5
– 1.8
mA
MAX
–1.2
UNIT
V
V
V
mA
µA
IO‡
VCC = 5.5 V,
VO = 2.25 V
– 30
– 112
– 30
– 112
mA
ICC
VCC = 5.5 V,
See Note 1
10.5
16
10.5
16
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded.
switching characteristics (see Note 2)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
Ω,
TA = MIN TO MAX§
SN54AS74A
MIN
fmax
tPLH
tPHL
tPLH
90
PRE or CLR
CLK
Q or Q
Q or Q
3
3.5
3.5
8.5
11.5
9
MAX
SN74AS74A
MIN
105
3
3.5
3.5
4.5
7.5
10.5
8
9
MAX
MHz
ns
ns
PARAMETER
FROM
(INPUT)
(
)
TO
(OUTPUT)
(
)
UNIT
tPHL
4.5
10.5
§ For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuit and voltage waveforms are shown in Section 1 of the
ALS/AS Logic Data Book,
1986.
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
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