SSG4932N
Elektronische Bauelemente
10 A, 30 V, R
DS(ON)
13.5 m
Dual N-Channel Mode Power MOSFET
RoHS Compliant Product
A suffix of “-C” specifies halogen & lead-free
DESCRIPTION
These miniature surface mount MOSFETs
utilize a high cell density trench process to
provide low R
DS(on)
and to ensure minimal
power loss and heat dissipation. Typical
applications are DC-DC converters and power
management In portable and battery-powered
products such as computers, printers, PCMCIA
cards, cellular and cordless telephones.
SOP-8
B
L
D
M
FEATURES
A
C
N
J
K
Low R
DS(on)
provides higher efficiency and
extends battery life.
Low thermal impedance copper leadframe
SOP-8 saves board space.
Fast switching speed.
High performance trench technology.
H
G
F
E
REF.
A
B
C
D
E
F
G
PACKAGE INFORMATION
Package
SOP-8
MPQ
2.5K
LeaderSize
13’ inch
Millimeter
Min.
Max.
5.80
6.20
4.80
5.00
3.80
4.00
0°
8°
0.40
0.90
0.19
0.25
1.27 TYP.
REF.
H
J
K
L
M
N
Millimeter
Min.
Max.
0.35
0.49
0.375 REF.
45°
1.35
1.75
0.10
0.25
0.25 REF.
S
G
S
G
D
D
D
D
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise specified)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
1
Pulsed Drain Current
2
Continuous Source Current (Diode Conduction)
1
Total Power Dissipation
1
Operating Junction & Storage Temperature Range
Thermal Resistance Junction-Case (Max.)
Notes:
1.
2.
Surface Mounted on 1” x 1” FR4 Board.
Pulse width limited by maximum junction temperature.
1
1
Symbol
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
I
S
P
D
@ T
A
= 25°C
P
D
@ T
A
= 70°C
T
J
, T
STG
R
θJC
R
θJA
Thermal Resistance Ratings
t
≦
5 sec
t
≦
5 sec
Ratings
30
±12
10
8.2
±50
2.3
2.1
1.3
-55 ~ 150
40
60
Unit
V
V
A
A
A
A
W
W
°C
°C / W
°C / W
Thermal Resistance Junction-ambient (Max.)
http://www.SeCoSGmbH.com/
Any changes of specification will not be informed individually.
31-Dec-2010 Rev. B
Page 1 of 2
SSG4932N
Elektronische Bauelemente
10 A, 30 V, R
DS(ON)
13.5 m
Dual N-Channel Mode Power MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
1
Drain-Source On-Resistance
1
Forward Transconductance
1
Diode Forward Voltage
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(ON)
g
fs
V
SD
100
1
-
-
-
20
-
-
-
-
-
-
-
-
-
-
-
-
40
0.7
Dynamic
2
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q
g
Q
gs
Q
gd
-
-
-
20
7.0
7.0
Switching
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Notes:
1.
2.
Pulse test：PW
≦
300
μs
duty cycle
≦
2%.
Guaranteed by design, not subject to production testing.
Max.
Unit
Teat Conditions
-
-
±100
1
25
-
13.5
20
-
-
V
V
nA
μA
μA
A
mΩ
S
V
V
GS
= 0V, I
D
= 250μA
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 0V, V
GS
= 12V
V
DS
= 80V, V
GS
= 0V
V
DS
= 80V, V
GS
= 0V, T
J
= 55°C
V
DS
= 5V, V
GS
= 10V
V
GS
= 4.5V, I
D
= 10A
V
GS
= 2.5V, I
D
= 8A
V
DS
= 15V, I
D
= 10A
I
S
= 2.3A, V
GS
= 0V
-
-
-
nC
I
D
= 10A
V
DS
= 15V
V
GS
= 5V
T
d(on)
T
r
T
d(off)
T
f
-
-
-
-
20
9
70
20
-
-
-
-
nS
V
DD
= 25V
I
D
= 1A
V
GEN
= 10V
R
L
= 25Ω
http://www.SeCoSGmbH.com/
Any changes of specification will not be informed individually.
31-Dec-2010 Rev. B
Page 2 of 2
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