AN2455
Application note
STWPLLSim phase noise and settling time simulator for STW8110x
Application and scope
The STWPLLSim tool helps the end user to design the optimal loop filter for the STW81101x
synthesizers. It provides a very accurate estimation of the overall phase noise and settling
time performances, allowing the user to interactively compare measurements with simulated
performance.
July 2007
Rev 2
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www.st.com
Installation
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1
Installation
The STWPLLSim software is written in Java and designed to run on Windows 2000/XP. To
perform time domain simulations, STWPLLSim requires the MATLAB Component Runtime
(MCR) Libraries (Copyright 1984-2005, The MathWorks, Inc. See
http://www.mathworks.com/access/helpdesk/help/toolbox/compiler/index.html?/access/help
desk/help/toolbox/compiler/f12-999353.html).
Run
SETUP.bat
to install STWPLLSim.
2
Main form
Figure 1.
STWPLLSim: main form and project flow
1 3
4
6
5
2
2.1
Creating and managing projects
New
and
Open
buttons allow the user to create a new project or to open an existing one.
The project can be saved by pressing the
Save
/
Save As
buttons.
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AN2455
Main form
2.2
Project flow
These are the steps to follow in using STWPLLSim, as shown in
Figure 1:
1.
Main settings (see the screenshot in
Figure 2):
a)
b)
c)
d)
e)
f)
Device choice (STW81101, STW81102, STW81103)
Output frequency [MHz]
Frequency step [kHz]
Output stage (direct output, divider by 2, divider by 4)
VCO and phase detector frequencies are calculated from the inserted data.
A table helps to choose the correct output stage depending on the desired output
frequency and the selected device.
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Main form
Figure 2.
Main settings
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1a
1b
1c
1d
1e
1f
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Main form
2.
3.
Prescaler: select the prescaler (either 16/17 or 19/20).
Reference clock (see the screenshot in
Figure 3):
a)
b)
Reference frequency
Fitting parameters for phase noise performance
Reference clock settings
Figure 3.
3a
3b
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