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■
Manual Configuration
Each section of this manual consists of a title, summary, main text, key information, precautions and
warnings, and references.The layout and definition of each section are shown below.
Header
Chapter number and
Chapter title
Section title
Sub section title
chapter 2
Basic CPU
2.8 Reset
2.8.1
Reset operation
the CPU contents are reset and registers are intialized when the NRST pin (P
27) is pulled to low.
Initiating a Reset
There are two methods to initiate areset.
(1) Drive the NRST pin low for at least four clock cycles.
NTST pin should be holded "low" for more than 4 clock cycles (200 ns a
t a 20 NHz)
Main text
NRST pin
4 clock cycles
(200 ns at a 20 MHz)
Figure:2.8.1 MInimum Reset PUlse Width
(2 Setting the P2OUT7 flag of the P2OUT register to "0" outputs low level at P
27 (NRST) pin. And transfering to reset by program (software reset) can be
executed. If the internal LSI is reset and register is initiated, the P2OUT
7 flag becomes "1" and reset is released.
Key information
Important information
from the text.
On this LSI, the starting mode is NORMAL mode that high oscillation i
s the base clock.
Precautions and
warnings
Precautions are listed
in case.
Be sure to read these
of lost functionality
or damage.
When the power voltage low circuit is connected to NTST pin, circuit t
hat gives pulse for enough low level time at sudeen unconnected. And r
set can be generated even if its pulse is low level as the oscillation
clock is under 4 clocks,take notice of noise.
footer
Page # and
section title.
II-48
Reset
Note: The example on this page is for explanation. It differs from an actual page.
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