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IDT71V3576S150BG

产品描述Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA119, BGA-119
产品类别存储    存储   
文件大小281KB,共22页
制造商IDT (Integrated Device Technology)
下载文档 详细参数 选型对比 全文预览

IDT71V3576S150BG概述

Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA119, BGA-119

IDT71V3576S150BG规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码BGA
包装说明BGA-119
针数119
Reach Compliance Codenot_compliant
ECCN代码3A991.B.2.A
最长访问时间3.8 ns
其他特性PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)150 MHz
I/O 类型COMMON
JESD-30 代码R-PBGA-B119
JESD-609代码e0
长度22 mm
内存密度4718592 bit
内存集成电路类型CACHE SRAM
内存宽度36
湿度敏感等级3
功能数量1
端子数量119
字数131072 words
字数代码128000
工作模式SYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织128KX36
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码BGA
封装等效代码BGA119,7X17,50
封装形状RECTANGULAR
封装形式GRID ARRAY
并行/串行PARALLEL
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3 V
认证状态Not Qualified
座面最大高度2.36 mm
最大待机电流0.03 A
最小待机电流3.14 V
最大压摆率0.295 mA
最大供电电压 (Vsup)3.465 V
最小供电电压 (Vsup)3.135 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn63Pb37)
端子形式BALL
端子节距1.27 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度14 mm

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128K x 36, 256K x 18
3.3V Synchronous SRAMs
3.3V I/O, Pipelined Outputs
Burst Counter, Single Cycle Deselect
x
x
IDT71V3576S
IDT71V3578S
IDT71V3576SA
IDT71V3578SA
Features
128K x 36, 256K x 18 memory configurations
Supports high system speed:
Commercial and Industrial:
– 150MHz 3.8ns clock access time
– 133MHz 4.2ns clock access time
LBO
input selects interleaved or linear burst mode
Self-timed write cycle with global write control (GW), byte write
enable (BWE), and byte writes (BWx)
3.3V core power supply
Power down controlled by ZZ input
3.3V I/O
Optional - Boundary Scan JTAG Interface (IEEE 1149.1
compliant)
Packaged in a JEDEC Standard 100-pin plastic thin quad
flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball
grid array (fBGA)
Description
The IDT71V3576/78 are high-speed SRAMs organized as
128K x 36/256K x 18. The IDT71V3576/78 SRAMs contain write, data,
address and control registers. Internal logic allows the SRAM to generate
a self-timed write based upon a decision which can be left until the end of
the write cycle.
The burst mode feature offers the highest level of performance to the
system designer, as the IDT71V3576/78 can provide four cycles of data
for a single address presented to the SRAM. An internal burst address
counter accepts the first cycle address from the processor, initiating the
access sequence. The first cycle of output data will be pipelined for one
cycle before it is available on the next rising clock edge. If burst mode
operation is selected (ADV=LOW), the subsequent three cycles of output
data will be available to the user on the next three rising clock edges. The
order of these three addresses are defined by the internal burst counter
and the
LBO
input pin.
The IDT71V3576/78 SRAMs utilize IDT’s latest high-performance
CMOS process and are packaged in a JEDEC standard 14mm x 20mm
100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array
(BGA) and a 165 fine pitch ball grid array (fBGA).
x
x
x
x
x
x
x
Pin Description Summary
A
0
-A
17
CE
CS
0
,
CS
1
OE
GW
BWE
BW
1
,
BW
2
,
BW
3
,
BW
4
(1)
CLK
ADV
ADSC
ADSP
LBO
TMS
TDI
TCK
TDO
TRST
ZZ
I/O
0
-I/O
31
, I/O
P1
-I/O
P4
V
DD
, V
DDQ
V
SS
Address Inputs
Chip Enable
Chip Selects
Output Enable
Global Write Enable
Byte Write Enable
Individual Byte Write Selects
Clock
Burst Address Advance
Address Status (Cache Controller)
Address Status (Processor)
Linear / Interleaved Burst Order
Test Mode Select
Test Data Input
Test Clock
Test Data Output
JTAG Reset (Optional)
Sleep Mode
Data Input / Output
Core Power, I/O Power
Ground
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Input
Input
I/O
Supply
Supply
Synchronous
Synchronous
Synchronous
Asynchronous
Synchronous
Synchronous
Synchronous
N/A
Synchronous
Synchronous
Synchronous
DC
Synchronous
Synchronous
N/A
Synchronous
Asynchronous
Asynchronous
Synchronous
N/A
N/A
5279 tbl 01
NOTE:
1.
BW
3
and
BW
4
are not applicable for the IDT71V3578.
JUNE 2003
1
DSC-5279/03
©2003 Integrated Device Technology, Inc.

IDT71V3576S150BG相似产品对比

IDT71V3576S150BG IDT71V3576S133BQI IDT71V3576S133PFI IDT71V3576S150BQI IDT71V3576S150PFI IDT71V3576S133BQ IDT71V3576S150BGI IDT71V3576SA150BQ IDT71V3576SA150BGI
描述 Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA119, BGA-119 Cache SRAM, 128KX36, 4.2ns, CMOS, PBGA165, FBGA-165 Cache SRAM, 128KX36, 4.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100 Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA165, FBGA-165 Cache SRAM, 128KX36, 3.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100 Cache SRAM, 128KX36, 4.2ns, CMOS, PBGA165, FBGA-165 Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA119, BGA-119 Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA165, FBGA-165 Cache SRAM, 128KX36, 3.8ns, CMOS, PBGA119, BGA-119
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
零件包装代码 BGA BGA QFP BGA QFP BGA BGA BGA BGA
包装说明 BGA-119 FBGA-165 14 X 20 MM, PLASTIC, TQFP-100 FBGA-165 14 X 20 MM, PLASTIC, TQFP-100 FBGA-165 BGA-119 FBGA-165 BGA-119
针数 119 165 100 165 100 165 119 165 119
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 3.8 ns 4.2 ns 4.2 ns 3.8 ns 3.8 ns 4.2 ns 3.8 ns 3.8 ns 3.8 ns
其他特性 PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE
最大时钟频率 (fCLK) 150 MHz 133 MHz 133 MHz 150 MHz 150 MHz 133 MHz 150 MHz 150 MHz 150 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-PBGA-B119 R-PBGA-B165 R-PQFP-G100 R-PBGA-B165 R-PQFP-G100 R-PBGA-B165 R-PBGA-B119 R-PBGA-B165 R-PBGA-B119
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0 e0
长度 22 mm 15 mm 20 mm 15 mm 20 mm 15 mm 22 mm 15 mm 22 mm
内存密度 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit
内存集成电路类型 CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
内存宽度 36 36 36 36 36 36 36 36 36
湿度敏感等级 3 3 3 3 3 3 3 3 3
功能数量 1 1 1 1 1 1 1 1 1
端子数量 119 165 100 165 100 165 119 165 119
字数 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words
字数代码 128000 128000 128000 128000 128000 128000 128000 128000 128000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 70 °C 85 °C 85 °C 85 °C 85 °C 70 °C 85 °C 70 °C 85 °C
最低工作温度 - -40 °C -40 °C -40 °C -40 °C - -40 °C - -40 °C
组织 128KX36 128KX36 128KX36 128KX36 128KX36 128KX36 128KX36 128KX36 128KX36
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 BGA TBGA LQFP TBGA LQFP TBGA BGA TBGA BGA
封装等效代码 BGA119,7X17,50 BGA165,11X15,40 QFP100,.63X.87 BGA165,11X15,40 QFP100,.63X.87 BGA165,11X15,40 BGA119,7X17,50 BGA165,11X15,40 BGA119,7X17,50
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 GRID ARRAY GRID ARRAY, THIN PROFILE FLATPACK, LOW PROFILE GRID ARRAY, THIN PROFILE FLATPACK, LOW PROFILE GRID ARRAY, THIN PROFILE GRID ARRAY GRID ARRAY, THIN PROFILE GRID ARRAY
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) NOT SPECIFIED 225 240 225 240 225 NOT SPECIFIED 225 NOT SPECIFIED
电源 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 2.36 mm 1.2 mm 1.6 mm 1.2 mm 1.6 mm 1.2 mm 2.36 mm 1.2 mm 2.36 mm
最大待机电流 0.03 A 0.035 A 0.035 A 0.035 A 0.035 A 0.03 A 0.035 A 0.03 A 0.035 A
最小待机电流 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V
最大压摆率 0.295 mA 0.26 mA 0.26 mA 0.305 mA 0.305 mA 0.25 mA 0.305 mA 0.295 mA 0.305 mA
最大供电电压 (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
最小供电电压 (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL
端子面层 Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn85Pb15) Tin/Lead (Sn63Pb37) Tin/Lead (Sn85Pb15) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37)
端子形式 BALL BALL GULL WING BALL GULL WING BALL BALL BALL BALL
端子节距 1.27 mm 1 mm 0.65 mm 1 mm 0.65 mm 1 mm 1.27 mm 1 mm 1.27 mm
端子位置 BOTTOM BOTTOM QUAD BOTTOM QUAD BOTTOM BOTTOM BOTTOM BOTTOM
处于峰值回流温度下的最长时间 NOT SPECIFIED 20 20 20 20 20 NOT SPECIFIED 20 NOT SPECIFIED
宽度 14 mm 13 mm 14 mm 13 mm 14 mm 13 mm 14 mm 13 mm 14 mm
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
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