1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 52-BGA MICROSTAR JUNIOR -40 to 85
| 参数名称 | 属性值 |
| Brand Name | Texas Instruments |
| 是否Rohs认证 | 不符合 |
| 厂商名称 | Texas Instruments(德州仪器) |
| 零件包装代码 | BGA |
| 包装说明 | VFBGA, BGA52,6X10,25 |
| 针数 | 52 |
| Reach Compliance Code | _compli |
| Factory Lead Time | 1 week |
| 系列 | 877 |
| 输入调节 | DIFFERENTIAL |
| JESD-30 代码 | R-PBGA-B52 |
| JESD-609代码 | e0 |
| 长度 | 7 mm |
| 逻辑集成电路类型 | PLL BASED CLOCK DRIVER |
| 最大I（ol） | 0.009 A |
| 湿度敏感等级 | 2 |
| 功能数量 | 1 |
| 反相输出次数 | |
| 端子数量 | 52 |
| 实输出次数 | 10 |
| 最高工作温度 | 85 °C |
| 最低工作温度 | -40 °C |
| 输出特性 | 3-STATE |
| 封装主体材料 | PLASTIC/EPOXY |
| 封装代码 | VFBGA |
| 封装等效代码 | BGA52,6X10,25 |
| 封装形状 | RECTANGULAR |
| 封装形式 | GRID ARRAY, VERY THIN PROFILE, FINE PITCH |
| 包装方法 | TR |
| 峰值回流温度（摄氏度） | 235 |
| 电源 | 1.8 V |
| 认证状态 | Not Qualified |
| Same Edge Skew-Max（tskwd） | 0.035 ns |
| 座面最大高度 | 1 mm |
| 最大供电电压 (Vsup) | 1.9 V |
| 最小供电电压 (Vsup) | 1.7 V |
| 标称供电电压 (Vsup) | 1.8 V |
| 表面贴装 | YES |
| 技术 | CMOS |
| 温度等级 | INDUSTRIAL |
| 端子面层 | Tin/Lead (Sn/Pb) |
| 端子形式 | BALL |
| 端子节距 | 0.65 mm |
| 端子位置 | BOTTOM |
| 处于峰值回流温度下的最长时间 | NOT SPECIFIED |
| 宽度 | 4.5 mm |
| 最小 fmax | 340 MHz |
| 器件名 | 厂商 | 描述 |
|---|---|---|
| CDCU877GQLR | Texas Instruments(德州仪器) | 1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 52-BGA MICROSTAR JUNIOR -40 to 85 |
| CDCUA877ZQL | Texas Instruments(德州仪器) | 877 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52, PLASTIC, BGA-52 |
| CDCU877AZQL | Texas Instruments(德州仪器) | 877 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52, 0.65 MM PITCH, PLASTIC, BGA-52 |
| CDCU877AGQLR | Texas Instruments(德州仪器) | Clock Drivers & Distribution 1.8v PLL Clock Driver |
| CDCU877AGQL | Texas Instruments(德州仪器) | 877 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52, 0.65 MM PITCH, PLASTIC, BGA-52 |
| CDCU877AZQLR | Texas Instruments(德州仪器) | 1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 52-BGA MICROSTAR JUNIOR -40 to 85 |
| CDCU877ARHAT | Texas Instruments(德州仪器) | 1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 40-VQFN -40 to 85 |
| 98ULPA877AKILF | IDT (Integrated Device Technology) | VFQFPN-40, Tray |
| 98ULPA877AHLFT | Renesas(瑞萨电子) | PLL Based Clock Driver, 98ULPA Series, 10 True Output(s), 0 Inverted Output(s), PBGA52 |
| ICS98ULPA877AHLF | Renesas(瑞萨电子) | PLL Based Clock Driver |
| 98ULPA877AKILF-T | Renesas(瑞萨电子) | PLL Based Clock Driver, 98ULPA Series, 10 True Output(s), 0 Inverted Output(s), PQCC40 |
| ICS98ULPA877AKI-T | Renesas(瑞萨电子) | PLL Based Clock Driver, 98ULPA Series, 10 True Output(s), 0 Inverted Output(s), PQCC40 |
| CDCU877RHATG4 | Texas Instruments(德州仪器) | 1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 40-VQFN -40 to 85 |
| CDCU877RHARG4 | Texas Instruments(德州仪器) | 1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications 40-VQFN -40 to 85 |
| ICS97U877YHT | Renesas(瑞萨电子) | PLL Based Clock Driver, 10 True Output(s), 0 Inverted Output(s), PBGA52 |
| CDCU877ARTBT | Texas Instruments(德州仪器) | Clock Drivers & Distribution 1.8v PLL Clock Driver |
| 98ULPA877AHI-T | IDT (Integrated Device Technology) | PLL Based Clock Driver, 98ULPA Series, 10 True Output(s), 0 Inverted Output(s), PBGA52, PLASTIC, MO-205, M0-225, VFBGA-52 |
| 97U877AK | IDT (Integrated Device Technology) | VFQFPN-40, Tray |
| CDCU877RTB | Texas Instruments(德州仪器) | 877 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40, 6 X 6 MM, 0.50 MM PITCH, PLASTIC, QFN-40 |
| ICS97U877AHT | IDT (Integrated Device Technology) | PLL Based Clock Driver, 97U Series, 10 True Output(s), 0 Inverted Output(s), PBGA52, BGA-52 |
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