PRTR5V0U4AD
Integrated quad ultra-low capacitance ESD protection
Rev. 01 — 17 December 2007
Product data sheet
1. Product profile
1.1 General description
The PRTR5V0U4AD is designed to protect Input/Output (I/O) ports that are sensitive
concerning capacitive load, such as USB 2.0, Ethernet, Digital Video Interface (DVI), etc.
from destruction by ElectroStatic Discharges (ESD). It provides protection to downstream
signal and supply components from ESD voltages as high as
±8
kV (contact discharge).
The PRTR5V0U4AD incorporates four pairs of ultra-low capacitance rail-to-rail diodes
plus an additional Zener diode. The rail-to-rail diodes are connected to the Zener diode
which allows ESD protection to be independent of the availability of a supply voltage.
The PRTR5V0U4AD is fabricated using thin film-on-silicon technology integrating four
ultra-low capacitance rail-to-rail ESD protection diodes in a miniature 6-lead SOT457
package.
1.2 Features
I
I
I
I
ESD protection compliant to IEC 61000-4-2 level 4,
±8
kV contact discharge
Low voltage clamping due to integrated Zener diode
Four ultra-low input capacitance (1 pF typical) rail-to-rail ESD protection diodes
Small 6-lead SOT457 package
1.3 Applications
I
General-purpose downstream ESD protection of high frequency analog signals and
high-speed serial data transmission for ports inside:
N
Cellular mobile handsets
N
USB 2.0 and IEEE 1394 ports in PC or notebook
N
Interfaces: DVI and High Definition Multimedia Interface (HDMI)
N
Cordless telephones
N
Wireless data systems: Wide Area Network (WAN) and Local Area Network (LAN)
N
Personal Digital Assistants (PDAs)
NXP Semiconductors
PRTR5V0U4AD
Integrated quad ultra-low capacitance ESD protection
2. Pinning information
Table 1.
Pin
1
2
3
4
5
6
Pinning
Description
ESD protection I/O 1
supply voltage (V
CC
)
ESD protection I/O 2
ESD protection I/O 3
ground (GND)
ESD protection I/O 4
1
2
3
001aah445
Simplified outline
Symbol
6
5
4
6
5
4
1
2
3
3. Ordering information
Table 2.
Ordering information
Package
Name
PRTR5V0U4AD
TSOP6
Description
plastic surface-mounted package (TSOP6); 6 leads
Version
SOT457
Type number
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
I
V
esd
Parameter
input voltage
electrostatic discharge
voltage
all pins; IEC 61000-4-2 level 4
contact discharge
air discharge
T
stg
storage temperature
−8
−15
−55
+8
+15
+125
kV
kV
°C
Conditions
Min
0
Max
5.5
Unit
V
5. Recommended operating conditions
Table 4.
Symbol
T
amb
Operating conditions
Parameter
ambient temperature
Conditions
Min
−40
Typ
-
Max
+85
Unit
°C
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
2 of 7
NXP Semiconductors
PRTR5V0U4AD
Integrated quad ultra-low capacitance ESD protection
6. Characteristics
Table 5.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol
C
(I/O-GND)
Parameter
input/output to ground
capacitance
reverse leakage current
breakdown voltage
supply pin to ground
capacitance
forward voltage
Measured from pins 1, 3, 4 and 6 to ground (GND).
Measured from pin 2 to ground (GND).
Conditions
V
(I/O-GND)
= 0 V;
V
CC
= 3.0 V;
f = 1 MHz
V
(I/O-GND)
= 3.0 V
I
I
= 1 mA
V
(I/O-GND)
= 0 V;
V
CC
= 3.0 V;
f = 1 MHz
[2]
[1]
Min
-
Typ
1.0
Max
-
Unit
pF
I
LR
V
BR
C
sup
[1]
-
6
-
-
-
40
100
9
-
nA
V
pF
V
F
[1]
[2]
-
0.7
-
V
7. Application information
The PRTR5V0U4AD is optimized to protect e.g. two USB 2.0 ports against ESD. Each
device is capable to protect both USB data lines and the V
BUS
supply.
A typical application is shown in
Figure 1.
V
BUS
V
BUS
D+
D−
GND
1
USB 2.0
IEEE 1394
CONTROLLER
2
3
6
5
4
V
BUS
D+
D−
GND
001aah446
Fig 1. Typical application of PRTR5V0U4AD
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
3 of 7
NXP Semiconductors
PRTR5V0U4AD
Integrated quad ultra-low capacitance ESD protection
8. Package outline
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
HE
v
M
A
6
5
4
Q
pin 1
index
A
A1
c
1
2
3
Lp
e
bp
w
M
B
detail X
0
1
scale
2 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
1.1
0.9
A1
0.1
0.013
bp
0.40
0.25
c
0.26
0.10
D
3.1
2.7
E
1.7
1.3
e
0.95
HE
3.0
2.5
Lp
0.6
0.2
Q
0.33
0.23
v
0.2
w
0.2
y
0.1
OUTLINE
VERSION
SOT457
REFERENCES
IEC
JEDEC
JEITA
SC-74
EUROPEAN
PROJECTION
ISSUE DATE
05-11-07
06-03-16
Fig 2. Package outline SOT457 (TSOP6)
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
4 of 7
NXP Semiconductors
PRTR5V0U4AD
Integrated quad ultra-low capacitance ESD protection
9. Revision history
Table 6.
Revision history
Release date
20071217
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
Document ID
PRTR5V0U4AD_1
PRTR5V0U4AD_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
5 of 7
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