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MK2772-01SLF

产品描述SOIC-20, Tube
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小670KB,共5页
制造商IDT (Integrated Device Technology)
标准  
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MK2772-01SLF概述

SOIC-20, Tube

MK2772-01SLF规格参数

参数名称属性值
Brand NameIntegrated Device Technology
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码SOIC
包装说明LEAD FREE, SOIC-20
针数20
制造商包装代码PSG20
Reach Compliance Codecompliant
ECCN代码EAR99
JESD-30 代码R-PDSO-G20
JESD-609代码e3
长度12.7255 mm
湿度敏感等级1
端子数量20
最高工作温度70 °C
最低工作温度
最大输出时钟频率27 MHz
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP20,.4
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)260
电源5 V
主时钟/晶体标称频率27 MHz
认证状态Not Qualified
座面最大高度2.6416 mm
最大供电电压5.25 V
最小供电电压4.75 V
标称供电电压5 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Matte Tin (Sn) - annealed
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度7.493 mm
uPs/uCs/外围集成电路类型CLOCK GENERATOR, OTHER

MK2772-01SLF文档预览

MK2772-01
VCXO and Set-Top Clock Source
Description
The MK2772-01 is a low cost, low jitter, high
performance VCXO and clock synthesizer for set-top
boxes. The on-chip Voltage Controlled Crystal
Oscillator accepts a 0 to 3V input voltage to cause the
output clocks to vary by ±100 ppm. Using ICS’
patented VCXO and analog Phase-Locked Loop (PLL)
techniques, the device uses an inexpensive 13.5 MHz
crystal input to produce multiple output clocks. All
clocks are frequency locked to the 27.00MHz output
(and to each other) with zero ppm error. The MK2772
includes a glitch-free multiplexer to switch input
sources during operation.
ICS manufactures the largest variety of Set-Top Box
and multimedia clock synthesizers for all applications.
Consult ICS to eliminate VCXOs, crystals and
oscillators from your board.
Features
• Packaged in 20 pin SOIC (Pb free available)
• Uses an inexpensive 13.5 MHz crystal
• On-chip VCXO (patented) with pull range
of 200ppm (minimum)
• Ability to switch input sources “on-the-fly”
• VCXO tuning voltage of 0 to 3V
• Zero ppm synthesis error (patented) in all
clocks. All exactly track 27MHz VCXO
• All clocks are frequency locked. All will vary the
same amount (in ppm) as the VCXO
• Selectable Audio clock for 256x, 384x, and 512x.
• 25mA output drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 5V operating voltage
Block Diagram
VDD
GND
3
3
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
ACS1:0
2
Audio Clock
INMUXSEL
EXTCLKIN
VIN
X1
Voltage Controlled
Crystal Oscillator
and x2 PLL
Clock
Synthesis
Circuitry
16.6667 MHz
11.0592 MHz
3.6864 MHz
3
13.5 MHz
pullable
crystal
X2
deglitched
mux
Output
Buffers
27.000 MHz
MDS 2772-01 D
1
Revision 102704
MK2772-01
VCXO and Set-Top Clock Source
Pin Assignment
ACS1
X2
X1
VDD
VIN
VDD
GND
16.67M
3.68M
ACLK
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ACS0
EXTCLKIN
27M
GND
27M
VDD
GND
27M
11.06M
INMUXSEL
Audio Clock Select
ACS1 ACS0 ACLK (MHz)
0
0
8.192
0
M
16.384
0
1
11.2896
M
0
16.9344
M
M
22.5792
M
1
18.432
1
0
12.288
1
M
24.576
1
1
5.6448
Input Source Select
INMUXSEL
0
1
27 MHz Input
EXTCLKIN
Internal VCXO
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
ACS1
X2
X1
VDD
VIN
VDD
GND
16.67M
3.68M
ACLK
INMUXSEL
11.06M
27M
GND
VDD
27M
GND
27M
EXTCLKIN
ACS0
Type Description
TI
X
X
P
VI
P
P
O
O
O
I
O
O
P
P
O
P
O
I
TI
Audio Clock Select 1. Determines ACLK frequency, as per table above.
Crystal connection. Connect to a pullable 13.5 MHz crystal.
Crystal connection. Connect to a pullable 13.5 MHz crystal.
Connect to +5V, and other VDDs.
Voltage Input to VCXO. Zero to 3V signal which controls the frequency of the VCXO.
Connect to +5V.
Connect to ground.
16.6667 MHz processor clock output.
3.6864 MHz clock output.
Audio Clock Output determined by ACS1,0. Per table above.
Input Multiplexer Select. Selects either the internal VCXO/PLL output, or the clock on pin 19.
11.0592 MHz clock output.
27.00 MHz clock output.
Connect to ground.
Connect to +5V.
27.00 MHz clock output.
Connect to ground.
27.00 MHz clock output.
External Clock Input. Connect an external 27 MHz clock to this pin for glitch free switching.
Audio Clock Select 0. Determines ACLK frequency, as per table above.
Key: I = Input, TI = tri-level input, VI = VCXO input, O = output, P = power supply connection, X = crystal connection
MDS 2772-01 D
2
Revision 102704
MK2772-01
VCXO and Set-Top Clock Source
Electrical Specifications
Parameter
Conditions
Minimum Typical Maximum Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 10 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 5.0V unless noted)
Operating Voltage, VDD
4.75
5.25
V
Input High Voltage, VIH, X1 pin only
3.5
2.5
V
Input Low Voltage, VIL, X1 pin only
2.5
1.5
V
Input High Voltage, VIH
ACS1, ACS0
VDD-0.5
V
Input High Voltage, VIH
INMUXSEL
2
V
Input Low Voltage, VIL
0.8
V
Output High Voltage, VOH
IOH=-25mA
2.4
V
Output Low Voltage, VOL
IOL=25mA
0.4
V
Output High Voltage, VOH, CMOS level
IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD
No Load, note 2
45
mA
Pull-up Resistor value
pin 11 only
250k
Input Capacitance
7
pF
Frequency synthesis error
All clocks as shown
0
1
ppm
VIN, VCXO control voltage
0
3
V
AC CHARACTERISTICS (VDD = 5.0V unless noted)
Input Crystal Frequency
13.50000
MHz
Input Crystal Accuracy
±30
ppm
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At 1.4V
40
60
%
Maximum Absolute Jitter, short term
300
ps
27 MHz output pullability, note 3
0V < VIN < 3V'
±100
ppm
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the
device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect
device reliability.
2. With ACLK at 12.288 MHz.
3. With a recommended crystal.
External Components/Crystal Selection
The MK2772-01 requires a minimum number of external components for proper operation. Decoupling capacitors
of 0.1µF should be connected between VDD (pin 15) and GND (14), and between VDD (4) and GND (7), as close to
the MK2772-01 as possible. A series termination resistor of 33Ω may be used for each clock output. The input
crystal must be connected as close to the chip as possible.
For the VCXO to operate correctly, a crystal properly specified and matched to the MK2772-01 must be used. For
more information, including a list of recommended crystals, refer to application note MAN05.
MDS 2772-01 D
3
Revision 102704
MK2772-01
VCXO and Set-Top Clock Source
Package Outline and Package Dimensions
20 pin SOIC
Inches
Symbol
A
b
c
D
E
H
e
h
Min
0.092
0.014
0.009
0.490
0.290
0.394
Max
0.104
0.019
0.012
0.512
0.300
0.419
0.016
0.003
0.011
0.076
Millimeters
Min
2.3368
0.356
0.229
12.446
7.366
10.008
Max
2.6416
0.483
0.305
13.005
7.620
10.643
0.406
0.279
E
H
.050 BSC
1.27 BSC
h x 45°
D
Q
Q
e
b
c
A
Ordering Information
Part/Order Number
MK2772-01S
MK2772-01STR
MK2772-01SLF
Marking
MK2772-01S
MK2772-01S
MK2772-01SLF
Shipping packaging
tubes
tape and reel
tubes
tape and reel
Package
20 pin SOIC
20 pin SOIC
20 pin SOIC
20 pin SOIC
Temperature
0-70°C
0-70°C
0-70°C
0-70°C
MK2772-01SLFTR
MK2772-01SLF
While the information presented herein has been checked for both accuracy and reliability, ICS Incorporated assumes no
responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its
use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any
other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental
requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or
specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical
medical instruments.
MDS 2772-01 D
4
Revision 102704
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • (408)295-9800tel • www.icst.com
IMPORTANT NOTICE AND DISCLAIMER
RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL
SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING
REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND
OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED,
INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible
for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3)
ensuring your application meets applicable standards, and any other safety, security, or other requirements. These
resources are subject to change without notice. Renesas grants you permission to use these resources only for
development of an application that uses Renesas products. Other reproduction or use of these resources is strictly
prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property.
Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims,
damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject
to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources
expands or otherwise alters any applicable warranties or warranty disclaimers for these products.
(Rev.1.0 Mar 2020)
Corporate Headquarters
TOYOSU FORESIA, 3-2-24 Toyosu,
Koto-ku, Tokyo 135-0061, Japan
www.renesas.com
Contact Information
For further information on a product, technology, the most
up-to-date version of a document, or your nearest sales
office, please visit:
www.renesas.com/contact/
Trademarks
Renesas and the Renesas logo are trademarks of Renesas
Electronics Corporation. All trademarks and registered
trademarks are the property of their respective owners.
© 2020 Renesas Electronics Corporation. All rights reserved.

MK2772-01SLF相似产品对比

MK2772-01SLF MK2772-01SLFTR
描述 SOIC-20, Tube SOIC-20, Reel
Brand Name Integrated Device Technology Integrated Device Technology
是否无铅 不含铅 不含铅
是否Rohs认证 符合 符合
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 SOIC SOIC
包装说明 LEAD FREE, SOIC-20 LEAD FREE, SOIC-20
针数 20 20
制造商包装代码 PSG20 PSG20
Reach Compliance Code compliant compliant
ECCN代码 EAR99 EAR99
JESD-30 代码 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e3 e3
长度 12.7255 mm 12.7255 mm
湿度敏感等级 1 1
端子数量 20 20
最高工作温度 70 °C 70 °C
最大输出时钟频率 27 MHz 27 MHz
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP SOP
封装等效代码 SOP20,.4 SOP20,.4
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE
峰值回流温度(摄氏度) 260 260
电源 5 V 5 V
主时钟/晶体标称频率 27 MHz 27 MHz
认证状态 Not Qualified Not Qualified
座面最大高度 2.6416 mm 2.6416 mm
最大供电电压 5.25 V 5.25 V
最小供电电压 4.75 V 4.75 V
标称供电电压 5 V 5 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL
端子面层 Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
端子形式 GULL WING GULL WING
端子节距 1.27 mm 1.27 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED
宽度 7.493 mm 7.493 mm
uPs/uCs/外围集成电路类型 CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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