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Datasheet> 器件分类 > 模拟混合信号IC> 驱动程序和接口> CY2LL842ZC
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CY2LL842ZC

产品描述Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16
产品类别模拟混合信号IC    驱动程序和接口   
文件大小159KB，共14页
制造商Cypress(赛普拉斯)
下载文档 详细参数 选型对比 全文预览

CY2LL842ZC概述

Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16

CY2LL842ZC规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Cypress(赛普拉斯)
零件包装代码TSSOP
包装说明TSSOP, TSSOP16,.25
针数16
Reach Compliance Codenot_compliant
ECCN代码EAR99
差分输出YES
驱动器位数2
输入特性DIFFERENTIAL
接口集成电路类型LINE TRANSCEIVER
接口标准EIA-644; TIA-644
JESD-30 代码R-PDSO-G16
JESD-609代码e0
长度5 mm
功能数量2
端子数量16
最高工作温度70 °C
最低工作温度
最小输出摆幅0.247 V
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP16,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）NOT SPECIFIED
电源3.3 V
认证状态Not Qualified
最大接收延迟6 ns
接收器位数2
座面最大高度1.1 mm
最大压摆率25 mA
最大供电电压3.6 V
最小供电电压3 V
标称供电电压3.3 V
表面贴装YES
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
最大传输延迟6 ns
宽度4.4 mm

CY2LL842ZC文档预览

ComLink™ Series
CY2LL842
Two-channel LVDS Repeater/Mux
Features
•
•
•
•
•
•
•
•
•
•
ANSI TIA/EIA-644-1995-compliant
Does not exceed Belcore 802.3 standards
Operation at => 350 MHz–700 Mbps
Single 2 × 2
Low-voltage differential signaling (LVDS) with output
voltages of
±
350 mV into 100-ohm load version (Std)
Single 3.3V supply
Accepts
±
350 mV differential inputs
Output drivers are high-impedance when disabled or
when V
DD
≤
1.5V
16-pin SOIC/TSSOP packages
Industrial version available
Description
The CYPRESS CY2LL842 are differential line drivers and
receivers that utilize LVDS to achieve signaling rates of 650
Mbs. The receiver outputs can be switched to either or both
drivers thru the multiplexer control signals S0/S1. This
provides flexibility in application for either a splitter or router
configuration with a single device.
The CYPRESS CY2LL842 is configured as a single
two-channel repeater/Mux.
The LVDS standard provides a minimum differential output
voltage of 247 mV into a 100-ohm load and receipt of as little
as 100-mV signals with up to 1V of DC offset between trans-
mitter and receiver.
A doubly terminated bus LVDS line enables multipoint config-
urations.
Designed for both point to point based-band multi-point data
transmission over controlled impedance lines.
Block Diagram
Pin Configuration
1B
VDD
1DE
1A
S0
1A
1B
2A
2B
1Y
1Z
2Y
2Z
1DE
S1
2A
2B
GND
GND
2DE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD
VDD
1Y
1Z
2DE
2Z
2Y
GND
S0 S1
16 pin SOIC/TSSOP
Cypress Semiconductor Corporation
Document #: 38-07063 Rev. **
•
3901 North First Street
•
San Jose
•
CY2LL842
CA 95134 • 408-943-2600
Revised July 29, 2002
ComLink™ Series
CY2LL842
Pin Description
Pin Number
1,2
3
4
5
6,7
8,9
10,11
12
14,13
15,16
Pin Name
1B, 1A
S0
1DE
S1
2A, 2B
Differential Input Channel 1
Function Select 0
Data Enable Channel 1
Function Select 1
Differential Input Channel 2
Ground
Differential Output Channel 2
Data Enable Channel 2
Differential Output Channel 1
Supply Voltage
Output
[1]
S1
0
0
1
1
1Y/1Z
1A/1B
2A/2B
1A/1B
2A/2B
2Y/2Z
1A/1B
2A/2B
2A/2B
1A/1B
–0.5V to 4V
–0.5V to 6.0V
–0.5V to V
DD
+0.5V
Class 3, A: 2KV, B: 500V
–65°C to 150°C
Pin Description
G
ND
2Y, 2Z
2DE
IY, 1Z
V
DD
Input
Table 1. Mux Function Table
Function
Splitter A
Splitter B
Pass Thru Router
Cross Point Router
S0
0
1
0
1
Table 2. Absolute Maximum Rating Over Operating Free-air Temperature
[2]
Supply Voltage Range, V
DD
(1)
Voltage Range (DE,S0,S1)
Input Voltage Range, V
IN
(A or B)
ESD (All pins)
Storage Temperature Range
Table 3. Recommended Operating Conditions
Parameter
V
DD
V
IH
V
IL
V
ID
V
IC
T
A
Parameter
VITH+
VITH-
II
II
II (Off)
Description
Supply Voltage
High-level Input Voltage
(S0,S1,1DE,2DE)
Low-level Input Voltage
(S0,S1,1DE,2DE)
Magnitude of Differential Input Voltage
0.1
Common Mode Input Voltage
( see
Figure 6,Figure 7,
and
Figure 8)
V
ID
/2
Operating Free Air Temperature
–40
Description
Positive-going Differential Input Voltage Threshold
Negative-going Differential Input Voltage Threshold
Input Current ( A Inputs)
Input Current (B Inputs)
Power-off Current (A or B Inputs)
Test Conditilons
V
CM
= 1.2V
V
CM
= 1.2V
VI = 0V
VI = 2.4V
VI = 0.8V
VI = 2.4V
V
DD
= 0V
Min.
3
2
Typ.
3.3
Max.
3.6
0.8
0.6
2.4–(VID/2)
85
Typ.
Max.
100
–10
–10
10
10
10
Unit
V
°C
Unit
mV
mV
uA
uA
uA
uA
uA
Table 4. Receiver Electrical Characteristics Over Recommended Operating Conditions
Min.
–100
–0.5
0.5
0.1
Notes:
1. See
Figure 1.
2. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Document #: 38-07063 Rev. **
Page 2 of 14
ComLink™ Series
CY2LL842
Table 5. Receiver Electrical Characteristics Over Recommended Operating Conditions
Parameter
V
OD
~V
OD
V
OC
(SS)
~V
OC
(SS)
V
OC
(PP)
I
CC
Description
Differential Output Voltage Swing
Change in differential Output Voltage Swing
between logic states
Steady State Common-mode output voltage
Change in Steady State Common-mode
output between logic states
Peak to Peak Common-mode output voltage
Supply Current
No load f = 100 MHz
RL = 100 ohm f = 100 MHz
Both Channels Disabled f = 100 MHz
I
H
I
IL
I
OS
I
OZ
C
in
High-level Input Current
Low-level Input Current
Short-circuit Current
High-impedance Output Current
Input Capacitance
Control Input Capacitance
S0,S1,DE
S0,S1,DE
V
IH
= 5V
V
IL
= 0.8V
V
OY
or V
0Z
= 0V
V
OD
= 0V
V
OD
= 60mV
V
O
= 0V or V
DD
1A, 1B, 2A, 2B
S0, S1, 1DE, 2DE
0.1
0.1
3
8
20
5
20
20
1
1
pF
pF
uA
See
Figure 10
Test Conditions
RL = 100 Ohm
See
Figure 9
Min. Typ. Max. Unit
247
–50
1.125
–50
3
340
454
50
1.375
50
150
25
25
20
mV
mV
V
mV
mV
mA
mA
mA
uA
uA
mA
Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions
[4]
Parameter
T
PLH
T
PHL
T
sk(p)
T
r
T
f
T
PHZ
T
PLZ
T
PZH
T
PZL
T
PHL_skR1_Dx
T
PLH_skR1_Dx
T
PPHL_skR2_Dx
T
PLH_skR2_Dx
D
J
(P-P)
Description
Differential Propagation delay, low to high
Differential Propagation delay, high to low
Pulse Skew ( T
PHL
–T
PLH
)
Transition Low to High
Transition High to Low
Propagation delay, high-level to high-impedance output
Propagation delay, low-level to high-impedance output
Propagation delay, high-impedance to high-level output
Propagation delay, high-impedance to low-level output
Channel to Channel skew-receiver 1 to Any mux related
drivers
Channel to Channel skew-receiver 1 to Any mux related
drivers
Channel to Channel skew-receiver 2 to Any mux related
drivers
Channel to Channel skew-receiver 2 to Any mux related
drivers
Deterministic Jitter (100 MHz 25C VID = 0.4 So,S1=00)
PRBS Differential
(see
Figure 12)
Test Conditions
CL = 10 pF
(see
Figure 11)
Min.
Typ.
[3]
4
4
0.2
800
800
4
4.3
3
2
95
95
95
95
95
1500
1500
10
10
10
10
Max.
6
6
Unit
nS
nS
nS
pS
pS
nS
nS
nS
nS
pS
pS
pS
pS
pS
Notes:
3. All typical values are measured at 25°C with a 3.3V supply.
4. These parameters are measured over supply voltage and temperature ranges recommended for the device.
Document #: 38-07063 Rev. **
Page 3 of 14
ComLink™ Series
CY2LL842
High-frequency Parametrics
Parameter
Fmax
Description
Test Conditions
Min.
Typ.
Max.
400
Unit
MHz
Maximum frequency V
DD
= 3.3V 50% duty cycle tW(50–50)
Standard Load Circuit.
Router Options
S 0/S 1
Splitter O ptions
S 0/S1
1A /1B
1Y/1Z
1A/1B
1Y/1Z
Cross
Point
Router
Splitter A
2A/2B
2Y /2Z
2A/2B
2Y/2Z
1A /1B
1Y/1Z
Pass
Thru
Router
1A/1B
1Y/1Z
Splitter B
2A /2B
2Y /2Z
2A/2B
2Y/2Z
S 0/S 1
S 0/S1
Figure 1. 2 Channel Cross Point Switch/Mux
Document #: 38-07063 Rev. **
Page 4 of 14
ComLink™ Series
CY2LL842
Dynamic IDD CY2LL842C
VID=0.4, VIC=1.2V S0, S1=00
Temp = 25°C
45.00
40.00
35.00
Idd (mA)
Dynamic IDD CY2LL842C
VID=0.4, VIC=1.2V S0, S1=01
Temp = 25°C
45.00
40.00
35.00
Idd (mA)
Vdd=3.00V
30.00
25.00
20.00
15.00
50
100
150
200
250
300
350
400
Fin (MHz)
Vdd=3.30V
Vdd=3.60V
30.00
25.00
Vdd=3.00V
20.00
15.00
50
100
150
200
250
300
Vdd=3.30V
Vdd=3.60V
350
400
Fin (MHz)
Dynamic IDD CY2LL842C
VID=0.4, VIC=1.2V S0, S1=00
Temp = 85°C
45.00
40.00
35.00
Idd (mA)
Idd (mA)
Dynamic IDD CY2LL842C
VID=0.4, VIC=1.2V S0, S1=01
Temp = 85°C
45.00
40.00
35.00
30.00
25.00
Vdd=3.00V
30.00
25.00
20.00
15.00
50
100
150
200
250
300
350
400
Fin (MHz)
Vdd=3.00V
Vdd=3.30V
Vdd=3.60V
20.00
15.00
50
100
150
200
250
300
Vdd=3.30V
Vdd=3.60V
350
400
Fin (MHz)
Figure 2. IDD vs. Frequency
Document #: 38-07063 Rev. **
Page 5 of 14
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CY2LL842ZC相似产品对比

CY2LL842ZC CY2LL842SCT CY2LL842SC CY2LL842SIT CY2LL842SI CY2LL842ZCT CY2LL842ZIT CY2LL842ZI
描述 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 0.150 INCH, SOIC-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 0.150 INCH, SOIC-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 0.150 INCH, SOIC-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 0.150 INCH, SOIC-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16 Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, PDSO16, 4.40 MM, TSSOP-16
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
厂商名称 Cypress(赛普拉斯) Cypress(赛普拉斯) Cypress(赛普拉斯) Cypress(赛普拉斯) Cypress(赛普拉斯) Cypress(赛普拉斯) Cypress(赛普拉斯) Cypress(赛普拉斯)
零件包装代码 TSSOP SOIC SOIC SOIC SOIC TSSOP TSSOP TSSOP
包装说明 TSSOP, TSSOP16,.25 SOP, SOP16,.25 SOP, SOP16,.25 SOP, SOP16,.25 SOP, SOP16,.25 TSSOP, TSSOP16,.25 TSSOP, TSSOP16,.25 TSSOP, TSSOP16,.25
针数 16 16 16 16 16 16 16 16
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
差分输出 YES YES YES YES YES YES YES YES
驱动器位数 2 2 2 2 2 2 2 2
输入特性 DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL
接口集成电路类型 LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER LINE TRANSCEIVER
接口标准 EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644
JESD-30 代码 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0
长度 5 mm 9.8933 mm 9.8933 mm 9.8933 mm 9.8933 mm 5 mm 5 mm 5 mm
功能数量 2 2 2 2 2 2 2 2
端子数量 16 16 16 16 16 16 16 16
最高工作温度 70 °C 70 °C 70 °C 85 °C 85 °C 70 °C 85 °C 85 °C
最小输出摆幅 0.247 V 0.247 V 0.247 V 0.247 V 0.247 V 0.247 V 0.247 V 0.247 V
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TSSOP SOP SOP SOP SOP TSSOP TSSOP TSSOP
封装等效代码 TSSOP16,.25 SOP16,.25 SOP16,.25 SOP16,.25 SOP16,.25 TSSOP16,.25 TSSOP16,.25 TSSOP16,.25
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度） NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
电源 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
最大接收延迟 6 ns 6 ns 6 ns 6 ns 6 ns 6 ns 6 ns 6 ns
接收器位数 2 2 2 2 2 2 2 2
座面最大高度 1.1 mm 1.7272 mm 1.7272 mm 1.7272 mm 1.7272 mm 1.1 mm 1.1 mm 1.1 mm
最大压摆率 25 mA 25 mA 25 mA 25 mA 25 mA 25 mA 25 mA 25 mA
最大供电电压 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V
标称供电电压 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES YES YES YES YES YES
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
端子节距 0.65 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.65 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
最大传输延迟 6 ns 6 ns 6 ns 6 ns 6 ns 6 ns 6 ns 6 ns
宽度 4.4 mm 3.899 mm 3.899 mm 3.899 mm 3.899 mm 4.4 mm 4.4 mm 4.4 mm

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器件捷径:   00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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