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CY74FCT16245CTPVCT

产品描述Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, 0.025 INCH PITCH, SSOP-48
产品类别逻辑    逻辑   
文件大小138KB,共7页
制造商Cypress(赛普拉斯)
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CY74FCT16245CTPVCT概述

Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, 0.025 INCH PITCH, SSOP-48

CY74FCT16245CTPVCT规格参数

参数名称属性值
厂商名称Cypress(赛普拉斯)
零件包装代码SSOP
包装说明SSOP,
针数48
Reach Compliance Codeunknown
其他特性WITH DIRECTION CONTROL
系列FCT
JESD-30 代码R-PDSO-G48
长度15.875 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS TRANSCEIVER
位数8
功能数量2
端口数量2
端子数量48
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd)4.1 ns
认证状态Not Qualified
座面最大高度2.794 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.635 mm
端子位置DUAL
宽度7.5 mm

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445T/2
fax id: 7041
CY74FCT16245T/2245T
CY74FCT16445T/2H245T
16-Bit Transceiver
Features
Low power, pin-compatible replacement for ABT
functions
FCT-E speed at 3.2 ns
Power-off disable outputs permits live insertion
Edge-rate control circuitry for significantly improved
noise characteristics
Typical output skew < 250 ps
ESD > 2000V
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
Industrial temperature range of –40°C to +85°C
V
CC
= 5V
±
10%
CY74FCT162H245T Features:
Bus hold on data inputs
Eliminates the need for external pull-up or pull-down
resistors
Functional Description
These 16-bit transceivers are designed for use in bidirectional
synchronous communication between two buses, where high
speed and low power are required. With the exception of the
CY74FCT16245T, these devices can be operated either as two
independent octals or a single 16-bit transceiver. Direction of
data flow is controlled by (DIR), the Output Enable (OE) trans-
fers data when LOW and isolates the buses when HIGH. The
output buffers are designed with power off disable capability to
allow for live insertion of boards.
The CY74FCT16245T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162245T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for minimal
undershoot
and
reduced
ground
bounce.
The
CY74FCT162245T is ideal for driving transmission lines.
The CY74FCT16445T is designed for 16-bit operation, reduc-
ing control lines from two OE and two DIR pins to one OE and
one DIR pin to reduce loading.
The CY74FCT162H245T is a 24-mA balanced output part that
has bus hold on the data inputs. The device retains the input’s
last state whenever the input goes to high impedance. This
eliminates the need for pull-up/down resistors and prevents
floating inputs.
CY74FCT16245T Features:
64 mA sink current, 32 mA source current
Typical V
OLP
(ground bounce)<1.0V at V
CC
= 5V,
T
A
= 25°C
CY74FCT162245T Features:
Balanced output drivers: 24 mA
Reduced system switching noise
Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
T
A
= 25°C
CY74FCT16445T Features:
64 mA sink current, 32 mA source current
Reduces system loading
Logic Block Diagrams CY74FCT16245T,CY74FCT162245T,
CY74FCT162H245T
1
DIR
1
OE
1
A
1
1
B
1
1
A
2
1
B
2
1
A
3
1
B
3
1
A
4
1
B
4
1
A
5
1
B
5
1
A
6
1
B
6
1
A
7
1
B
7
1
A
8
1
B
8
2
A
8
2
B
8
2
A
7
2
B
7
2
A
6
2
B
6
2
A
5
2
B
5
2
A
4
2
B
4
2
A
3
2
B
3
2
A
2
2
B
2
2
A
1
2
B
1
2
DIR
2
OE
Pin Configuration
SSOP/TSSOP
Top View
1
DIR
1
B
1
1
B
2
1
2
3
4
5
6
48
47
46
45
44
43
1
OE
1
A
1
1
A
2
GND
1
B
3
1
B
4
GND
1
A
3
1
A
4
V
CC
1
B
5
1
B
6
GND
1
B
7
1
B
8
2
B
1
2
B
2
7 16245T 42
8 162245T 41
162H2455T
9
40
10
39
11
12
13
14
15
16
17
18
19
20
21
22
23
24
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
CC
1
A
5
1
A
6
GND
1
A
7
1
A
8
2
A
1
2
A
2
GND
2
B
3
2
B
4
V
CC
2
B
5
2
B
6
GND
2
A
3
2
A
4
V
CC
2
A
5
2
A
6
GND
2
B
7
2
B
8
2
DIR
GND
2
A
7
2
A
8
2
OE
FCT16245–1
FCT16245–2
FCT16245–3
Cypress Semiconductor Corporation
3901 North First Street
San Jose
• CA 95134 •
408-943-2600
July 1994 – Revised October 30, 1997

 
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