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74LVC373ABQ,115

产品描述LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
产品类别逻辑    逻辑   
文件大小147KB,共19页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
标准
下载文档 详细参数 选型对比 全文预览

74LVC373ABQ,115概述

LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20

LVC/LCX/Z 系列, 8位 驱动, 实输出, PDSO20

74LVC373ABQ,115规格参数

参数名称属性值
Brand NameNXP Semiconduc
是否Rohs认证符合
厂商名称NXP(恩智浦)
零件包装代码QFN
包装说明HVQCCN, LCC20,.1X.18,20
针数20
制造商包装代码SOT764-1
Reach Compliance Codecompli
系列LVC/LCX/Z
JESD-30 代码R-PQCC-N20
JESD-609代码e4
长度4.5 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
湿度敏感等级1
位数8
功能数量1
端口数量2
端子数量20
最高工作温度125 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码HVQCCN
封装等效代码LCC20,.1X.18,20
封装形状RECTANGULAR
封装形式CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法TAPE AND REEL
峰值回流温度(摄氏度)260
电源3.3 V
Prop。Delay @ Nom-Su8.5 ns
传播延迟(tpd)10.5 ns
认证状态Not Qualified
座面最大高度1 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)1.2 V
标称供电电压 (Vsup)2.7 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式NO LEAD
端子节距0.5 mm
端子位置QUAD
处于峰值回流温度下的最长时间30
宽度2.5 mm
Base Number Matches1

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74LVC373A
Octal D-type transparent latch with 5 V tolerant
inputs/outputs; 3-state
Rev. 3 — 22 November 2012
Product data sheet
1. General description
The 74LVC373A consists of eight D-type transparent latches, featuring separate D-type
inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable
input (pin LE) and an output enable input (pin OE) are common to all internal latches.
When pin LE is HIGH, data at the D-inputs (pins D0 to D7) enters the latches. In this
condition, the latches are transparent, that is, a latch output will change each time its
corresponding D-input changes. When pin LE is LOW, the latches store the information
that was present at the D-inputs one set-up time preceding the HIGH-to-LOW transition of
pin LE.
When pin OE is LOW, the contents of the eight latches are available at the Q-outputs (pins
Q0 to Q7). When pin OE is HIGH, the outputs go to the high-impedance OFF-state.
Operation of input pin OE does not affect the state of the latches.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V and 5 V applications.
The 74LVC373A is functionally identical to the 74LVC573A, but has a different pin
arrangement.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
High-impedance outputs when V
CC
= 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C

74LVC373ABQ,115相似产品对比

74LVC373ABQ,115 74LVC373AD,112 74LVC373AD,118 74LVC373ADB,112 74LVC373ADB,118 74LVC373APW,112 74LVC373APW,118
描述 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
Brand Name NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconduc
是否Rohs认证 符合 符合 符合 符合 符合 符合 符合
厂商名称 NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
零件包装代码 QFN SOP SOP SSOP2 SSOP2 TSSOP2 TSSOP2
包装说明 HVQCCN, LCC20,.1X.18,20 7.50 MM, PLASTIC, MS-013, SOT-163-1, SO-20 SOP, SOP20,.4 5.30 MM, PLASTIC, MO-150, SOT-339-1, SSOP-20 SSOP, SSOP20,.3 TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25
针数 20 20 20 20 20 20 20
制造商包装代码 SOT764-1 SOT163-1 SOT163-1 SOT339-1 SOT339-1 SOT360-1 SOT360-1
Reach Compliance Code compli compli compli compli compli compli compli
系列 LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 代码 R-PQCC-N20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e4 e4 e4 e4 e4 e4 e4
长度 4.5 mm 12.8 mm 12.8 mm 7.2 mm 7.2 mm 6.5 mm 6.5 mm
负载电容(CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
逻辑集成电路类型 BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
湿度敏感等级 1 1 1 1 1 1 1
位数 8 8 8 8 8 8 8
功能数量 1 1 1 1 1 1 1
端口数量 2 2 2 2 2 2 2
端子数量 20 20 20 20 20 20 20
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 HVQCCN SOP SOP SSOP SSOP TSSOP TSSOP
封装等效代码 LCC20,.1X.18,20 SOP20,.4 SOP20,.4 SSOP20,.3 SSOP20,.3 TSSOP20,.25 TSSOP20,.25
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法 TAPE AND REEL TUBE TAPE AND REEL TUBE TAPE AND REEL TUBE TAPE AND REEL
峰值回流温度(摄氏度) 260 260 260 260 260 260 260
电源 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Su 8.5 ns 8.5 ns 8.5 ns 8.5 ns 8.5 ns 8.5 ns 8.5 ns
传播延迟(tpd) 10.5 ns 10.5 ns 10.5 ns 10.5 ns 10.5 ns 10.5 ns 10.5 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1 mm 2.65 mm 2.65 mm 2 mm 2 mm 1.1 mm 1.1 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
标称供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
表面贴装 YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
端子面层 Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
端子形式 NO LEAD GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
端子节距 0.5 mm 1.27 mm 1.27 mm 0.65 mm 0.65 mm 0.65 mm 0.65 mm
端子位置 QUAD DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 30 30 30 30 30 30 30
宽度 2.5 mm 7.5 mm 7.5 mm 5.3 mm 5.3 mm 4.4 mm 4.4 mm
Base Number Matches 1 1 1 1 1 1 1

 
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