K4S28163LD-R(B)F/R
2M x 16Bit x 4 Banks Mobile sDRAM in 54CSP
FEATURES
• 2.5V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
-. CAS latency (1 & 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation.
• Special Function Support.
-. PASR (Partial Array Self Refresh).
-. TCSR (Temperature Compensated Self Refresh).
• DQM for masking.
• Auto refresh.
• 64ms refresh period (4K cycle).
• Commercial Temperature Operation(-25°C~70°C )
• 54balls CSP( -RXXX -Pb, -BXXX -Pb Free).
K4S28163LD-R(B)F/R75
K4S28163LD-R(B)F/R1H
K4S28163LD-R(B)F/R1L
CMOS SDRAM
GENERAL DESCRIPTION
The K4S28163LD is 134,217,728 bits synchronous high data
rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits,
fabricated with SAMSUNG′s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock and I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length and programmable latencies allow the same device
to be useful for a variety of high bandwidth, high performance
memory system applications.
ORDERING INFORMATION
Part No.
Max Freq.
133MHz(CL=3)
105MHz(CL=2)
105MHz(CL=2)
105MHz(CL=3)
*1
LVCMOS
Interface Package
54 CSP
Pb
(Pb Free)
K4S28163LD-R(B)F/R15 66MHz(CL=2/3)
*2
FUNCTIONAL BLOCK DIAGRAM
-R(B)R ; Super Low Power, Operating Temp : -25°C ~ 70°C.
-R(B)F ; Low Power, Oterating Temp : -25
°C
~ 70°C.
Note :
1. In case of 40MHz Frequency, CL1 can be supported.
2. In case of 33MHz Frequency, CL1 can be supported.
I/O Control
LWE
Data Input Register
LDQM
Bank Select
2M x 16
2M x 16
2M x 16
2M x 16
Refresh Counter
Output Buffer
Row Decoder
Sense AMP
Row Buffer
DQi
Address Register
CLK
ADD
Column Decoder
Col. Buffer
LRAS
LCBR
Latency & Burst Length
LCKE
LRAS
LCBR
LWE
LCAS
Programming Register
LWCBR
LDQM
Timing Register
CLK
CKE
CS
RAS
CAS
WE
LDQM
UDQM
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.3 Dec. 2002
K4S28163LD-R(B)F/R
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on V
DD
supply relative to Vss
Storage temperature
Power dissipation
Short circuit current
Symbol
V
IN
, V
O U T
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 3.6
-1.0 ~ 3.6
-55 ~ +150
1
50
CMOS SDRAM
Unit
V
V
°C
W
mA
Notes :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions(Voltage referenced to V
SS
= 0V, T
A
= -25°C to 70°C)
Parameter
Supply voltage
V
DDQ
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
V
IH
V
IL
V
O H
V
OL
I
LI
1.65
0.8 x V
DDQ
-0.3
V
DDQ
-0.2
-
-10
-
-
0
-
-
-
2.7
V
DDQ
+ 0.3
0.3
-
0.2
10
V
V
V
V
V
uA
1
2
I
OH
= -0.1mA
I
OL
= 0.1mA
3
Symbol
V
DD
Min
2.3
Typ
2.5
Max
2.7
Unit
V
Note
Notes :
1. V
IH
(max) = 3.0V AC.The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -1.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
CAPACITANCE
(V
DD
= 2.5V, T
A
= 23°C, f = 1MHz, V
REF
=0.9V
±
50 mV)
Pin
Clock
RAS, CAS, WE, CS, CKE, DQM
Address
DQ
0
~ DQ
15
Symbol
C
CLK
C
IN
C
ADD
C
OUT
Min
2.0
2.0
2.0
3.5
Max
4.0
4.0
4.0
6.0
Unit
pF
pF
pF
pF
Note
Rev. 1.3 Dec. 2002
K4S28163LD-R(B)F/R
DC CHARACTERISTICS
Recommended operating conditions(Voltage referenced to V
SS
= 0V, T
A
= -25
°C
to 70°C )
CMOS SDRAM
Version
Parameter
Symbol
Burst length = 1
t
RC
≥
t
R C
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
Test Condition
-75
65
-1H
65
0.5
mA
0.5
10
mA
9
7
mA
7
20
20
100
155
TCSR Range
4 Banks
-R(B)F
Self Refresh Current
I
CC6
CKE
≤
0.2V
2 Banks
1 Bank
4 Banks
-R(B)R
2 Banks
1 Bank
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S28163LD-R(B)F**
4. K4S28163LD-R(B)R**
5. Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ)
80
150
80
140
70
115
mA
mA
mA
mA
°C
1
2
-1L
60
-15
55
Unit
Note
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
I
CC1
I
CC2
P
mA
1
I
CC2
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
C C 2
N
CKE
≥
V
IH
(min), CS
≥
V
I H
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
Precharge Standby Current
in non power-down mode
I
CC2
NS
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
I
CC3
P
I
CC3
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
C C 3
N
I
CC3
NS
I
CC4
I
CC5
CKE
≥
V
IH
(min), CS
≥
V
I H
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA , Page burst
4Banks Activated, t
CCD
= 2CLKs
t
RC
≥
t
RC
(min)
Max 45°C
300
250
230
200
150
130
Max 70°C
450
350
310
330
230
190
3
uA
4
Rev. 1.3 Dec. 2002
PCB设计
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