Product Information
High Voltage SLA6860M and SMA6860M Series
Driver ICs for 3-Phase DC Motor Applications
Introduction
The SLA6860M and SMA6860M Series consists of inverter
power module (IPM) devices that integrate within a single,
compact package: power MOSFETs, pre-driver ICs, and fast
recovery diodes. These products are especially suitable for
driving the inverters of low-capacity motors, such as those
used in 100 to 200 V fans or pumps for air conditioners.
Features and benefits include the following:
▪
Three built-in bootstrap fast recovery diodes (FRD),
each with current-limiting resistor, and capable of
withstanding high voltages: 600 V at 1 A
▪
Overcurrent limiting (OCL) function, with fault signal
output and shutdown input terminal; when the user-
determined maximum current level is exceeded, PWM
on-off cycling is initiated to effectively limit current
▪
Built-in overcurrent protection (OCP) function; when an
overcurrent condition, such as an output short circuit, is
detected, the internal high-side and low-side logic ICs
shut down the output driver gates and issue a fault signal
▪
Optional automatic shutdown of high-side and low-side
gates if an abnormal condition occurs (overtemperature,
overcurrent, undervoltage on control power supply, and
so forth); enabled by connecting together the SD1 and
SD2 terminals
▪
Built-in overtemperature protection for both high-side
and low-side circuits; thermal shutdown (TSD) occurs
when the temperature of the logic chips exceed a user-
determined value, the internal high-side and low-side
logic ICs shut down the output driver gates and issue a
fault signal
Product Lineup*
Type
MOSFET
Rating
Application
FAN Motor, Pump
Input
Voltage
(VAC)
230
230
230
230
230
230
Heat-
sink
–
–
–
Yes
Yes
Yes
Leadform 2451
Leadform 2175
Leadform 2452
Leadform 2171
Figure 1. SMA6860M Series packages are SIPs, offering compact
configurations both with heatsink pad (leadforms 2171 and 2175)
and without (leadforms 2451 and 2452). Both horizontal mount and
vertical mount are available.
▪
Built-in undervoltage lockout (UVLO) protection for
each control power supply, VCC1, VCC2, and VBx;
when voltage falls below a set value, the gates are shut
down and VCC1 and VCC2 output an alarm signal
▪
Alarm signal (shutdown) output when protection circuits
enable; high-side faults (UVLO and TSD) are signaled
on the SD1 terminal, low-side faults (TSD, OCP, and
UVLO) are signaled on the SD2 terminal
Contents
Introduction
Functional Description
Terminal Descriptions
Protection Functions
Typical Applications
Protection Function Timing
Application Circuit Recommendations
Electrical Characteristics Data
1
2
3
8
12
18
19
19
SMA6861M 250 V / 2 A
SMA6862M 500 V / 1.5 A FAN Motor, Pump
SMA6863M 500 V / 2.5 A FAN Motor, Pump
SLA6866M
SLA6867M
SLA6868M
250 V / 2 A
FAN Motor, Pump
500 V / 1.5 A FAN Motor, Pump
500 V / 2.5 A FAN Motor, Pump
*SMA6861M : SLA6866M, SMA6862M : SLA6867M, and also
SMA6863M : SLA6868M are electrically identical respectively.
28610.14, Rev. 2
▪
Power MOSFETs incorporating fast recovery diodes (FRD)
provide low losses in comparison with IGBT technology
▪
Use of SIP 24-pin power package, proven in other high-
volume Sanken product lines, with L-bend and zigzag
leadforms available; L-bends formed with precautions to
ensure device integrity; zigzags for stable mounting; heatsink
tab option
MOSFET turns on at V
xINx
= high). The boot capacitors are con-
nected between VB1 and U, VB2 and V, and VB3 and W1, as the
high voltage power source.
The protection functions, including overcurrent protection
(enable at detected short circuit, and so forth), overtemperature
protection (at abnormal ambient temperature, overload, and so
forth), and undervoltage of low control power supply voltage
(at instantaneous fall, and so forth) are built-in and when any of
these functions is operated, it can be monitored at the correspond-
ing output terminal.
The current limiter (OCL) signal is provided as a control signal,
and when the current flowing across the shunt resistor exceeds
the typical limit value, the OCL terminal turns on. Current limit-
ing can be enabled by connecting this signal to the SD1 terminal
(for high-side limiting) or to the SD2 terminal (for low-side
limiting).
Functional Description
The functional block diagram for one of the three device phases
is shown in figure 2. High voltage power and 15 VDC are input
between VBB and LS1/LS2, between VCC1 and COM1, and
between VCC2 and COM2. The on/off signals of the power
MOSFETs are operated by six signals: HIN1, HIN2, HIN3,
LIN1, LIN2, and LIN3. These input signals are positive logic (the
VB1
VB2
VB3
VCC1
UVLO
UVLO
UVLO
UVLO
VBB
HIN1
HIN2
HIN3
COM1
SD1
VCC 2
Input
Logic
High-Side
Level Shift Driver
W1
W2
V
U
UVLO
LIN1
LIN2
LIN3
COM2
SD2
OCL
RC
Input Logic
(OCP Reset )
Thermal
Shutdown
OCP
Low-Side
Driver
LS 2
OCP and OCL
LS1
Figure 2. SLA6860M/SMA6860M Series Phase Block Diagram. These devices
support high-side and low-side three-phase MOSFET output drivers.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Terminal Descriptions
A summary description of the function of the various terminals is
given in the Terminal List table. Pin 1 for each package appears
in figure 3. This section provides detailed functional descriptions
of the individual pins.
VBB
This is the terminal for the main power supply. For supply-
ing the SMA6861M, V
BB
should be 200 VDC or lower and in
other products, 400 VDC or lower. To suppress surge voltage, a
snubber capacitor (0. 01 to 0.1
μF)
and an electrolytic capacitor
should be connected to the device by traces having the shortest
length practicable. If the trace lengths are long, surge voltages
will be increased. It should be verified that surge voltage does not
exceed the breakdown voltage of the MOSFETs internal to the
device itself.
U, V, W1, and W2
These are the output terminals connected to
the motor. W1 and W2 should be connected together externally,
and are used in short circuit events.
Terminal List Table
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
VB1
VB2
VB3
VCC1
SD1
COM1
HIN3
HIN2
HIN1
VBB
W1
V
W2
LS2
RC
LS1
OCL
LIN3
LIN2
LIN1
COM2
SD2
VCC2
U
LS1 and LS2
These are the source terminals for the low-side
power MOSFETs. LS1 and LS2 should be connected together
externally. When a shunt resistor is connected to this terminal, the
lengths of the traces should be as short as practicable. If the trace
lengths are long, malfunctions due to noise are likely to occur.
VCC1 and VCC2
These are the power supply terminals of the
built-in pre-driver ICs. VCC1 and VCC2 should be should be
connected together externally. In order to prevent malfunctions
due to noise on the power supply lines, a ceramic bypass capaci-
tor (0.01 to 0.1
μF)
should be mounted near the terminals.
Note: If V
CCx
exceeds 20 V, permanent damage may occur. It is
recommended to add a Zener diode (V
Z
= 18 to 20 V) to protect
against such surge voltages.
The control power supply undervoltage protection circuit is inte-
grated with VCC1 and VCC2. The supplied voltage should not be
allowed to drop below the rated threshold voltage of VCC1 and
VCC2.
Function
High side bootstrap terminal (U phase)
High side bootstrap terminal (V phase)
High side bootstrap terminal (W phase)
High side logic supply voltage
High side shutdown input and UVLO fault signal output
High side logic GND terminal
High side input terminal (W phase)
High side input terminal (V phase)
High side input terminal (U phase)
Main supply voltage
Output of W phase (connect to W2 externally)
Output of V phase
Output of W phase (connect to W1 externally)
Low side emitter terminal (connect to LS1 externally)
Overcurrent protection hold time adjustment input terminal
Low side emitter terminal (connect to LS2 externally)
Output for overcurrent limiting
Low side input terminal (W phase)
Low side input terminal (V phase)
Low side input terminal (U phase)
Low side GND terminal
Low side shutdown input and overtemperature, overcurrent, and UVLO fault signals output
Low side logic supply voltage
Output of U phase
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
31.3 ±0.2
31 ±0.2
24.4 ±0.2
16.4 ±0.2
Gate protrusion
Ø3.2 ±0.15
0.6
1.7 ±0.1
Ø3.2 ±0.15
4.8 ±0.2
Exposed
heatsink pad
2X Gate protrusion
16 ±0.2 B
12.9 ±0.2
9.9 ±0.2
Branding Area
2X Exposed
tie bar
2.45 ±0.2
BSC
(A)
5 ±0.5
9.5 +0.7
– 0.5
R1
REF
+0.15
0.5 – 0.05
4.5
REF
0.6 +0.15
– 0.05
1.27 ±0.7 A
4.5 ±0.7
31.3 ±0.1
31 ±0.2
24.4 ±0.2
16.4 ±0.2
Gate protrusion
Ø3.2 ±0.15
2X Gate protrusion
16 ±0.2 B
2.45 ±0.1
BSC
3 ±0.3
BSC
2.2 ±0.6
BSC
4.4
REF
0.6 +0.2
– 0.1
R1
REF
0.6
1.7 ±0.1
Ø3.2 ±0.15
4.8 ±0.2
Exposed
heatsink pad
(B)
Branding Area
12.9 ±0.2
9.9 ±0.1
2X Exposed
tie bar
1.27 ±0.2 A
2.2 ±0.6
BSC
0.5 ±0.1
Figure 3(A) and (B). Package Outline Drawings. (A) LF2171 vertical
mount, (B) LF2175 horizontal mount, with heatsink pads.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Gate protrusion
31.3 ±0.2
31 ±0.2
4 ±0.2
(C)
2X Gate protrusion
1.2 ±0.1
BSC
10.2 ±0.2
3 ±0.5
BSC
2.2 ±0.7
BSC
R1
REF
2X Exposed
tie bar
4.4
REF
1
C
0.7
+0.15
– 0.05
0.6 +0.15
– 0.05
1.27 ±0.1 A
1.27 ±0.6 B
2.2 ±0.7
BSC
0.55 +0.2
– 0.1
Gate protrusion
31.3 ±0.2
31 ±0.2
4 ±0.2
(D)
2X Gate protrusion
10.2 ±0.2
1.2 ±0.1
BSC
2X Exposed
tie bar
5 ±0.5
9.5 +0.7
– 0.5
R1
REF
0.5 +0.15
– 0.05
4.5
REF
1
1.27 ±0.5 A
0.6 +0.15
– 0.05
4.5 ±0.5
Figure 3 (C) and (D). Package Outline Drawings. (C) LF2451, L-bend
horizontal mount and (D) LF2452, vertical mount; no heatsink pads.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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