HCC/HCF40109B
QUAD LOW-TO-HIGH VOLTAGE LEVEL SHIFTER
.
.
.
.
.
.
.
.
.
INDEPENDENCE OF POWER SUPPLY SE-
QUENCE CONSIDERATIONS – V
CC
CAN EX-
CEED V
DD
, INPUT SIGNALS CAN EXCEED
BOTH V
CC
AND V
DD
UP AND DOWN LEVEL-SHIFTING CAPA-
BILITY
THREE-STATE OUTPUTS WITH SEPARATE
ENABLE CONTROLS
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED AT 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N°. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
controls produces a high-impedance state in the
corresponding output.
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
C1
(Micro package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC40109BF
HCF40109BM1
HCF40109BEY HCF40109BC1
DESCRIPTION
The
HCC40109B
(extended temperature range)
and
HCF40109B
(intermediate temperature range)
are monolithic integrated circuits, available in 16-
lead dual in-line plastic or ceramic package and
plastic micropackage. The
HCC/HCF40109B
con-
tains four low-to-high-voltage level-shifting circuits.
Each circuit will shift a low-voltage digital-logic input
signal (A, B, C, D) with logical 1 = V
CC
and logical 0
= V
SS
to a higher-voltage output signal (E, F, G, H)
with logical 1 = V
DD
and logical 0 = V
SS
. The
HCC/HCF40109B,
unlike other low-to-high level-
shifting circuits, does not require the presence of the
high-voltage supply (V
DD
) before the application of
either the low-voltage supply (V
CC
) or the input sig-
nals. There are no restrictions on the sequence of
application of V
DD
, V
CC
, or the input signals. In ad-
dition, there are no restrictions on the relative mag-
nitudes od the supply voltages or input signals within
the device maximum ratings ; V
CC
may exceed V
DD
,
and input signals may exceed V
CC
, and V
DD
. When
operated in the mode V
CC
V
DD
, the
HCC/HCF40109B,
will operate as a high-to-low
level-shifter. The
HCC/HCF 40109B
also features
individual three-state output capability. A low level
on any of the separately enabled three-state output
June 1989
PIN CONNECTIONS
1/12
HCC/HCF40109B
FUNCTIONAL DIAGRAM
1 of 4 units
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DD
*
V
i
I
I
P
to t
Parameter
Supply Voltage :
HC C
Types
H C F
Types
Input Voltage
DC Input Current (any one input)
Total Power Dissipation (per package)
Dissipation per Output Transistor
for T
o p
= Full Package-temperature Range
Operating Temperature :
HCC
Types
H CF
Types
Storage Temperature
Value
– 0.5 to + 20
– 0.5 to + 18
– 0.5 to V
DD
+ 0.5
±
10
200
100
– 55 to + 125
– 40 to + 85
– 65 to + 150
Unit
V
V
V
mA
mW
mW
°C
°C
°C
T
op
T
stg
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage are with respect to V
SS
(GND).
RECOMMENDED OPERATING CONDITIONS
Symbol
V
DD
V
I
T
op
Parameter
Supply Voltage :
H CC
Types
H C F
Types
Input Voltage
Operating Temperature :
HCC
Types
H CF
Types
Value
3 to 18
3 to 15
0 to V
DD
– 55 to + 125
– 40 to + 85
Unit
V
V
V
°C
°C
LOGIC DIAGRAM
TRUTH TABLE
Inputs
Mode
Low to High
Level Shift
Outputs
Enable
A, B, C , D A, B, C , D E , F , G , H
0
1
X
LOGIC 0 = LOW (V
SS
)
LOGIC 1 = V
CC
1
1
0
0
1
Z
X = Don’t Care.
Z = High Impedance.
at INPUTS and V
DD
at OUTPUTS.
2/12
HCC/HCF40109B
STATIC ELECTRICAL CHARACTERISTICS
(continued)
Test Conditions
Symbol
Parameter
V
I
(V)
V
O
(V)
0/18
0/15
Any Input
I
O
V
CC
V
DD
(V) (V) (V)
18
15
T
L ow
*
Min. Max.
±
0.4
±
1.0
Min.
Value
25
°C
Typ. Max.
±10
- 4
±
0.4
±10
5
-4
T
Hig h
*
Min.
Max.
±
12
Unit
I
OH
,
I
OL
**
3-State
Output
Leakage
Current
HCC
Types 0/18
HCF
Types 0/15
µA
±
1.0
7.5
±
7.5
pF
C
I
Input Capacitance
* T
Low
= – 55°C for
HCC
device : – 40°C for
HCF
device.
* T
High
= + 125°C for
HCC
device : + 85°C for
HCF
device.
The Noise Margin for both ”1” and ”0” level is : 1V min. with V
DD
= 5V, 2V min. with V
DD
= 10V, 2.5V min. with V
DD
= 15V.
** Forced output disabled.
DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
= 25°C, C
L
= 50pF, R
L
= 200kΩ,
typical temperature coefficient for all V
DD
values is 0.3%/°C, all input rise and fall time = 20ns)
Symbol
t
PHL
,
t
PLH
Parameter
Propagation Delay Time
(data input to output)
High to Low Level
Shifting Mode
Test Conditions
V
CC
(V)
V
DD
(V)
5
10
5
15
10
15
10
5
15
5
15
10
5
10
5
15
10
15
10
5
15
5
15
10
5
10
5
15
10
15
10
5
15
5
15
10
5
10
5
15
10
15
10
5
15
5
15
10
5
10
5
15
10
15
10
5
15
5
15
10
Min.
Value
Typ.
300
220
180
850
850
290
130
120
70
230
230
80
60
50
35
120
120
40
320
230
180
800
800
280
370
300
250
850
850
350
Max.
600
440
360
1600
1600
580
260
240
140
460
460
160
120
100
70
240
240
80
640
460
360
1500
1500
560
740
600
500
1600
1600
700
Unit
L-H
ns
H-L
Low to High Level
L-H
ns
H-L
t
PHZ
3-State Disable Delay Time
Output High to High Impedance
L-H
ns
H-L
t
PZ H
High Impedance to Output High
L-H
ns
H-L
t
PLZ
Output Low to High Impedance
L-H
ns
H-L
4/12
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