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HY5V56BLF-HI: 产品描述Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54; 产品类别存储存储; 文件大小291KB，共12页; 制造商SK Hynix(海力士); 官网地址http://www.hynix.com/eng/

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HY5V56BLF-HI概述

Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54

HY5V56BLF-HI规格参数

参数名称	属性值
厂商名称	SK Hynix(海力士)
零件包装代码	BGA
包装说明	FBGA, BGA54,9X9,32
针数	54
Reach Compliance Code	unknown
ECCN代码	EAR99
访问模式	FOUR BANK PAGE BURST
最长访问时间	5.4 ns
其他特性	AUTO/SELF REFRESH
最大时钟频率 (fCLK)	133 MHz
I/O 类型	COMMON
交错的突发长度	1,2,4,8
JESD-30 代码	R-PBGA-B54
JESD-609代码	e1
长度	13.5 mm
内存密度	268435456 bit
内存集成电路类型	SYNCHRONOUS DRAM
内存宽度	16
功能数量	1
端口数量	1
端子数量	54
字数	16777216 words
字数代码	16000000
工作模式	SYNCHRONOUS
最高工作温度	85 °C
最低工作温度	-40 °C
组织	16MX16
输出特性	3-STATE
封装主体材料	PLASTIC/EPOXY
封装代码	FBGA
封装等效代码	BGA54,9X9,32
封装形状	RECTANGULAR
封装形式	GRID ARRAY, FINE PITCH
电源	3.3 V
认证状态	Not Qualified
刷新周期	8192
座面最大高度	1.07 mm
自我刷新	YES
连续突发长度	1,2,4,8,FP
最大待机电流	0.001 A
最大压摆率	0.22 mA
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	3 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	TIN SILVER COPPER
端子形式	BALL
端子节距	0.8 mm
端子位置	BOTTOM
宽度	8 mm

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HY5V56B(L/S)F-I Series

4 Banks x 4M x 16bits Synchronous DRAM

Preliminary

DESCRIPTION

The HY5V56B(L)F is a 268,435,456bit CMOS Synchronous DRAM, ideally suited for the Mobile applications which

require low power consumption and industrial temperature range. HY5V56B(L)F is organized as 4banks of

4,194,304x16

HY5V56B(L)F is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs

are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high

bandwidth. All input and output voltage levels are compatible with LVTTL.

Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write

cycles initiated by a single control command (Burst length of 1,2,4,8, or full page), and the burst count

sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate

command or can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined

design is not restricted by a `2N` rule.)

FEATURES

•

Single 3.3±0.3V power supply

All device balls are compatible with LVTTL interface

54Ball FBGA (13.5mm x 8.0mm)

All inputs and outputs referenced to positive edge of

system clock

Data mask function by UDQM or LDQM

•

Internal four banks operation

Programmable CAS Latency ; 2, 3 Clocks

•

Auto refresh and self refresh

8192 refresh cycles / 64ms

Programmable Burst Length and Burst Type

- 1, 2, 4, 8 or Full page for Sequential Burst

- 1, 2, 4 or 8 for Interleave Burst

•

ORDERING INFORMATION

Part No.

HY5V56BF-HI

HY5V56BF-8I

HY5V56BF-PI

HY5V56BF-SI

HY5V56B(L)F-HI

HY5V56B(L)F-8I

HY5V56B(L)F-PI

HY5V56B(L)F-SI

Clock Frequency

133MHz

125MHz

100MHz

133MHz

125MHz

100MHz

Power

Organization

Interface

Package

Normal

4Banks x 4Mbits

x16

Low power

LVTTL

54ball FBGA

This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

use of circuits described. No patent licenses are implied.

Rev. 0.1/Sep. 02

HY5V56BLF-HI相似产品对比

	HY5V56BLF-HI	HY5V56BF-HI	HY5V56BF-8I	HY5V56BF-PI	HY5V56BF-SI	HY5V56BLF-PI	HY5V56BLF-SI	HY5V56BLF-8I
描述	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 6ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 6ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 6ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 6ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 6ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54	Synchronous DRAM, 16MX16, 6ns, CMOS, PBGA54, 13.50 X 8 MM, 0.80 MM PITCH, FBGA-54
厂商名称	SK Hynix(海力士)	SK Hynix(海力士)	SK Hynix(海力士)	SK Hynix(海力士)	SK Hynix(海力士)	SK Hynix(海力士)	SK Hynix(海力士)	SK Hynix(海力士)
零件包装代码	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
包装说明	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32	FBGA, BGA54,9X9,32
针数	54	54	54	54	54	54	54	54
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN代码	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
访问模式	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
最长访问时间	5.4 ns	5.4 ns	6 ns	6 ns	6 ns	6 ns	6 ns	6 ns
其他特性	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
最大时钟频率 (fCLK)	133 MHz	133 MHz	125 MHz	100 MHz	100 MHz	100 MHz	100 MHz	125 MHz
I/O 类型	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
交错的突发长度	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8
JESD-30 代码	R-PBGA-B54	R-PBGA-B54	R-PBGA-B54	R-PBGA-B54	R-PBGA-B54	R-PBGA-B54	R-PBGA-B54	R-PBGA-B54
JESD-609代码	e1	e1	e1	e1	e1	e1	e1	e1
长度	13.5 mm	13.5 mm	13.5 mm	13.5 mm	13.5 mm	13.5 mm	13.5 mm	13.5 mm
内存密度	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit
内存集成电路类型	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
内存宽度	16	16	16	16	16	16	16	16
功能数量	1	1	1	1	1	1	1	1
端口数量	1	1	1	1	1	1	1	1
端子数量	54	54	54	54	54	54	54	54
字数	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words
字数代码	16000000	16000000	16000000	16000000	16000000	16000000	16000000	16000000
工作模式	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
组织	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA	FBGA
封装等效代码	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32	BGA54,9X9,32
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH
电源	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
刷新周期	8192	8192	8192	8192	8192	8192	8192	8192
座面最大高度	1.07 mm	1.07 mm	1.07 mm	1.07 mm	1.07 mm	1.07 mm	1.07 mm	1.07 mm
自我刷新	YES	YES	YES	YES	YES	YES	YES	YES
连续突发长度	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP
最大待机电流	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A
最大压摆率	0.22 mA	0.22 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
标称供电电压 (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
端子面层	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER	TIN SILVER COPPER
端子形式	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
端子节距	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
端子位置	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
宽度	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm	8 mm

HY5V56BLF-HI

HY5V56BLF-HI概述

HY5V56BLF-HI规格参数

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