Freescale Semiconductor
Technical Data
Document Number: MC33897
Rev. 17.0, 1/2011
Single Wire CAN Transceiver
The 33897 Series provides a physical layer for digital
communications purposes using a Carrier Sense Multiple Access/
Collision Resolution (CSMA/CR) data link operating over a single wire
medium. This is more commonly referred to as Single Wire Controller
Area Network (CAN).
The 33897 Series operates directly from a vehicle's 12 V battery
system or a broad range of DC-power sources. It can operate at either
low or high (33.33 kbps or 83.33 kbps) data rates. A high-voltage
wake-up feature allows the device to control the regulator used in
support of the MCU and other logic. The device includes a control pin
that can be used to put the module regulator into Sleep mode. The
presence of a defined wake-up voltage level on the bus will reactivate
the control line to turn the regulator and the system back ON.
The device complies with the GMW3089v2.4 General Motors
Corporation specification.
Features
•
•
•
•
•
•
•
•
Waveshaping for Low Electromagnetic Interference (EMI)
Detects and automatically handles loss of ground
Worst-case sleep mode current of only 75
μA
Current limit prevents damage due to bus shorts
Built-in thermal shutdown on bus output
Protected against vehicular electrical transients
Under-voltage lockout prevents false data with low battery
Pb-free packaging designated by suffix code EF
33897
SINGLE WIRE CAN
TRANSCEIVER
EF (PB-FREE) SUFFIX
98ASB42565B
14-PIN SOICN
ORDERING INFORMATION
Device
MCZ33897TEF/R2
*MC33897CTEF/R2
Temperature
Range (T
A
)
-40 to 125 °C
Package
14 SOICN
*Recommended device for all new designs
Power
source
Voltage
Regulator
EN
V
CC
TXD
MCU
RXD
MODE 0
MODE 1
BUS
LOAD
SWC Bus
Battery
33897
CNTL
VBATT
GND
4
Figure 1. 33897 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2006 - 2011. All rights reserved.
DEVICE VARIATIONS
DEVICE VARIATIONS
Table 1. Device Variations
Part No.
33897T
*33897CT
Load Voltage Sleep Mode
1.0 V Max
0.1 V Max
See Page
7
7
*Recommended device for all new designs
33897
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
TXD
Bus DRVR
TX
BUS DRVR
MODE0
MODE1
HV WU E n
HVWU Enable
Mode
Mode
Co ntrol
Control
Wa ve Sha ping E n
Waveshaping Enable
TX Dat
Data
TXD
a
Disab le
Disable
BUS
Bus RCVR
BUS RCVR
HVWU
De t
HV WU
Detect
RX Dat a
RXD Data
Disab le
Disable
TXD
RXD
Undervoltage
Detect
Timer
OSC
Load Switch
VBATT
BAT
Timers
LOAD
GND
CNTL
Figure 2. 33897 Simplified Internal Block Diagram
33897
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
PIN CONNECTIONS
33897
GND
TXD
MODE0
MODE1
RXD
NC
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
GND
NC
BUS
LOAD
VBATT
CNTL
GND
Figure 3. 33897 Pin Connections
Table 2. Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section, beginning on page
12.
33897 Pin
1, 7, 8, 14
2
3, 4
5
6, 13
9
10
11
12
Pin Name
GND
TXD
MODE0,
MODE1
RXD
NC
CNTL
VBATT
LOAD
BUS
Formal Name
Ground
Transmit Data
Mode Control
Receive Data
No Connect
Control
Battery
Load
Bus
Definition
Electrical Common Ground and Heat removal. A good thermal path will also reduce
the die temperature.
Data input here will appear on the BUS pin. A logic [0] will assert the bus, a logic [1]
will make the bus go to the recessive state.
These Pins control Sleep mode, Transmit Level, and Speed. They have weak pull-
downs.
Open drain output of the data on BUS. A recessive bus = a logic [1], a dominant bus
= logic [0]. An external pull-up is required.
No internal connection to these Pins. Pin 13 can be connected to GND.
Provides a battery level logic signal.
Power input. An external diode is needed for reverse battery protection.
The external bus load resistor connects here to prevent bus pull-up in the event of
loss of module ground.
This pin connects to the bus through external components.
33897
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 3. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating
Electrical Ratings
Supply Voltage
Input Logic Voltage
RXD Pin Voltage
CNTL Pin Voltage
ESD Voltage
(1)
Human Body Model
All Pins Except BUS
BUS Pin
Machine Model
Thermal Ratings
Ambient Operating Temperature
(1)
Junction Operating Temperature
Storage Temperature
Junction-to-Ambient Thermal Resistance
Peak Package Reflow Temperature During Reflow
(2)
,
(3)
T
A
T
J
T
STG
R
θ
JA
T
PPRT
- 40 to 125
- 40 to 150
- 55 to 150
150
Note 3.
°C
°C
°C
°C/W
°C
± 2000
± 4000
± 100
V
BATT
V
IN
V
RXD
V
CNTL
V
ESD
- 0.3 to 40
- 0.3 to 7.0
- 0.3 to 7.0
- 0.3 to 40
V
V
V
V
V
Symbol
Value
Unit
Notes
1. ESD testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
Ω),
Machine Model (C
ZAP
= 200 pF, R
ZAP
= 0
Ω).
2.
3.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
33897
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
