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IDT7054L45GB

产品描述Multi-Port SRAM, 4KX8, 45ns, CMOS, CPGA108, CAVITY UP, PGA-108
产品类别存储    存储   
文件大小99KB,共11页
制造商IDT (Integrated Device Technology)
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IDT7054L45GB概述

Multi-Port SRAM, 4KX8, 45ns, CMOS, CPGA108, CAVITY UP, PGA-108

IDT7054L45GB规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码PGA
包装说明PGA, PGA108,12X12
针数108
Reach Compliance Codenot_compliant
ECCN代码3A001.A.2.C
最长访问时间45 ns
其他特性AUTOMATIC POWER-DOWN
I/O 类型COMMON
JESD-30 代码S-CPGA-P108
JESD-609代码e0
长度30.48 mm
内存密度32768 bit
内存集成电路类型MULTI-PORT SRAM
内存宽度8
功能数量1
端口数量4
端子数量108
字数4096 words
字数代码4000
工作模式ASYNCHRONOUS
最高工作温度125 °C
最低工作温度-55 °C
组织4KX8
输出特性3-STATE
可输出YES
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码PGA
封装等效代码PGA108,12X12
封装形状SQUARE
封装形式GRID ARRAY
并行/串行PARALLEL
峰值回流温度(摄氏度)225
电源5 V
认证状态Not Qualified
筛选级别38535Q/M;38534H;883B
座面最大高度5.207 mm
最大待机电流0.0045 A
最小待机电流2 V
最大压摆率0.325 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn/Pb)
端子形式PIN/PEG
端子节距2.54 mm
端子位置PERPENDICULAR
处于峰值回流温度下的最长时间30
宽度30.48 mm

文档预览

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Integrated Device Technology, Inc.
HIGH-SPEED
4K X 8 FOURPORT™
STATIC RAM
DESCRIPTION:
IDT7054S/L
PRELIMINARY
FEATURES:
• High-speed access
— Military: 20/25/35/45ns (max.)
— Commercial: 15/20/25/35/45ns (max.)
• Low-power operation
— IDT7054S
Active: 750mW (typ.)
Standby: 10mW (typ.)
— IDT7054L
Active: 750mW (typ.)
Standby: 1.5mW (typ.)
• True Four-Port memory cells which allow simultaneous
reads of the same memory locations
• Fully asynchronous operation from each of the four ports:
P1, P2, P3, P4
• Battery backup operation—2V data retention
• TTL-compatible; single 5V (±10%) power supply
• Available in several popular hermetic and plastic
packages for both through-hole and surface mount
• Military product compliant to MIL-STD-883, Class B
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
The IDT7054 is a high-speed 4K x 8 FourPort Static RAM
designed to be used in systems where multiple access into a
common RAM is required. This FourPort Static RAM offers
increased system performance in multiprocessor systems
that have a need to communicate in real time and also offers
added benefit for high-speed systems in which multiple
access is required in the same cycle.
The IDT7054 is also designed to be used in systems where
on-chip hardware port arbitration is not needed. This part
lends itself to those systems which cannot tolerate wait states
or are designed to be able to externally arbitrate or withstand
contention when all ports simultaneously access the same
FourPort RAM location.
The IDT7054 provides four independent ports with sepa-
rate control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. It is the user’s responsibility to ensure data integrity
when simultaneously accessing the same memory location
from all ports. An automatic power down feature, controlled
by
CE
, permits the on-chip circuitry of each port to enter a very
low power standby power mode.
FUNCTIONAL BLOCK DIAGRAM
R/
P1
P1
P1
R/
P4
P4
P4
I/O
0P1
-I/O
7P1
COLUMN
I/O
COLUMN
I/O
I/O
0P4
-I/O
7P4
A
0P1
- A
11P1
PORT 1
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
PORT 2
ADDRESS
DECODE
LOGIC
PORT 4
ADDRESS
DECODE
LOGIC
PORT 3
ADDRESS
DECODE
LOGIC
A
0P4
- A
11P4
A
0P2
- A
11P2
A
0P3
- A
11P3
I/O
0P2
-I/O
7P2
P2
COLUMN
I/O
COLUMN
I/O
I/O
0P3
-I/O
7P3
P3
P3
P3
3241 drw 01
P2
R/
P2
R/
The IDT logo and FourPort are trademarks of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995 Integrated Device Technology, Inc.
AUGUST 1995
DSC-1270/-
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