PD-60361
IRMCK171
High Performance Sensorless Motor Control IC
Features
MCE
TM
(Flexible Motion Control Engine) -
Dedicated computation engine for high efficiency
sinusoidal sensorless motor control
Built-in hardware peripheral for single or two
shunt current feedback reconstruction and analog
circuits
Supports induction machine and both interior and
surface permanent magnet motor sensorless
control
Loss minimization Space Vector PWM
Two-channel analog output (PWM)
Embedded 8-bit high speed microcontroller (8051)
for flexible I/O and man-machine control
JTAG programming port for emulation/debugger
Serial communication interface (UART)
I
2
C/SPI serial interface
Three general purpose timers/counters
Two special timers: analog watchdog timer,
periodic timer, capture timer
Internal 32Kbyte OTP ROM
5V tolerant I/O
3.3V single supply
Product Summary
Maximum clock input (f
crystal
)
Maximum Internal clock (SYSCLK)
Maximum 8051 clock (8051CLK)
Sensorless control computation time (max.)
MCE
TM
60 MHz
128MHz
32MHz
48
μsec
16 bit signed
20KB
2KB
computation data range
8051 OTP Program ROM (min.)
805/MCE Data RAM
MCE Program RAM
12KB
PWM carrier frequency
A/D input channels
A/D converter resolution
A/D converter conversion speed
Analog output (PWM) resolution
UART baud rate (typ)
Number of I/O (max)
Package
Maximum 3.3V operating current
60mA
20 bits/ SYSCLK
7
12 bits
2
μsec
8 bits
57.6K bps
10
QFP48
Description
IRMCK171 is a high performance One Time Programmable ROM based motion control IC designed primarily for appliance
applications. IRMCK171 is designed to achieve low cost yet high performance control solutions for advanced inverterized
appliance motor control. IRMCK171 contains two computation engines. One is the Flexible Motion Control Engine (MCE
TM
) for
sensorless control of permanent magnet motors or induction motors; the other is an 8-bit high-speed microcontroller (8051).
Both computation engines are integrated into one monolithic chip. The MCE
TM
contains a collection of control elements
implemented in a dedicated computation engine such as Vector rotator, Arc-Tangent, Multiply/Divide, Low loss SVPWM and
Motor current sensing. The user can program a motion control algorithm by connecting Control elements using a graphic
compiler. Key components of the complex sensorless control algorithms, such as the Angle Estimator, are provided as
complete pre-defined control blocks. A unique analog/digital circuit and algorithm to fully support single shunt current
reconstruction is also provided. The 8051 microcontroller performs 2-cycle instruction execution (16.5MIPS at 33MHz
8051CLK). The MCE and 8051 microcontroller communicate via dual port RAM for signal monitoring and command input. An
advanced graphic compiler for the MCE
TM
is seamlessly integrated into the MATLAB/Simulink environment, while third party
JTAG-based emulator tools are supported for 8051 software development including an OTP programmer. IRMCK171 comes in
a 48 pin QFP package.
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
IRMCK171
Table of Contents
Overview.................................................................................................................................................... 5
Pinout ........................................................................................................................................................ 6
IRMCK171 Block Diagram and Main Functions........................................................................................ 7
Application connection and Pin function ................................................................................................... 9
4.1
8051 Peripheral Interface Group...................................................................................................... 10
4.2
Motion Peripheral Interface Group................................................................................................... 11
4.3
Analog Interface Group .................................................................................................................... 11
4.4
Power Interface Group ..................................................................................................................... 11
4.5
Test Interface Group ........................................................................................................................ 11
5 DC Characteristics .................................................................................................................................. 12
5.1
Absolute Maximum Ratings ............................................................................................................. 12
5.2
System Clock Frequency and Power Consumption ........................................................................ 12
5.3
Digital I/O DC Characteristics .......................................................................................................... 13
5.4
PLL and Oscillator DC characteristics ............................................................................................. 14
5.5
Analog I/O (IFB+,IFB-,IFBO, AIN5+,AIN5-,AIN5O) DC Characteristics .......................................... 14
5.6
Under Voltage Lockout DC characteristics ...................................................................................... 15
5.7
Itrip comparator DC characteristics ................................................................................................. 15
5.8
CMEXT and AREF Characteristics .................................................................................................. 15
6 AC Characteristics................................................................................................................................... 16
6.1
Digital PLL AC Characteristics......................................................................................................... 16
6.2
Analog to Digital Converter AC Characteristics ............................................................................... 17
6.3
Op amp AC Characteristics ............................................................................................................. 18
6.4
SYNC to SVPWM and A/D Conversion AC Timing ......................................................................... 19
6.5
GATEKILL to SVPWM AC Timing ................................................................................................... 20
6.6
Itrip AC Timing ................................................................................................................................. 20
6.7
Interrupt AC Timing .......................................................................................................................... 21
6.8
I
2
C AC Timing................................................................................................................................... 21
6.9
SPI AC Timing.................................................................................................................................. 22
6.10
UART AC Timing .......................................................................................................................... 24
6.11
CAPTURE Input AC Timing ......................................................................................................... 25
6.12
OTP Programming Timing............................................................................................................ 26
6.13
JTAG AC Timing........................................................................................................................... 27
7 I/O Structure ............................................................................................................................................ 28
8 Pin List..................................................................................................................................................... 31
9 Package Dimensions............................................................................................................................... 33
10
Part Marking Information ..................................................................................................................... 34
1
2
3
4
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
2
IRMCK171
List of Tables
Table 1 Absolute Maximum Ratings............................................................................................................... 12
Table 2 System Clock Frequency .................................................................................................................. 12
Table 3 Digital I/O DC Characteristics............................................................................................................ 13
Table 4 PLL DC Characteristics ..................................................................................................................... 14
Table 5 Analog I/O DC Characteristics .......................................................................................................... 14
Table 6 UVcc DC Characteristics................................................................................................................... 15
Table 7 Itrip DC Characteristics ..................................................................................................................... 15
Table 8 CMEXT and AREF DC Characteristics ............................................................................................. 15
Table 9 PLL AC Characteristics ..................................................................................................................... 16
Table 10 A/D Converter AC Characteristics................................................................................................... 17
Table 11 Current Sensing OP Amp AC Characteristics................................................................................. 18
Table 12 SYNC AC Characteristics................................................................................................................ 19
Table 13 GATEKILL to SVPWM AC Timing................................................................................................... 20
Table 14 Itrip AC Timing................................................................................................................................. 20
Table 15 Interrupt AC Timing ......................................................................................................................... 21
Table 16 I
2
C AC Timing .................................................................................................................................. 21
Table 17 SPI Write AC Timing........................................................................................................................ 22
Table 18 SPI Read AC Timing ....................................................................................................................... 23
Table 19 UART AC Timing ............................................................................................................................. 24
Table 20 CAPTURE AC Timing...................................................................................................................... 25
Table 21 OTP Programming Timing............................................................................................................... 26
Table 22 JTAG AC Timing.............................................................................................................................. 27
Table 23 Pin List ............................................................................................................................................. 32
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
3
IRMCK171
List of Figures
Figure 1 Typical Application Block Diagram Using IRMCK171........................................................................ 5
Figure 2 Pinout of IRMCK171........................................................................................................................... 6
Figure 3 Crystal circuit example ..................................................................................................................... 16
Figure 4 Voltage droop and S/H hold time ..................................................................................................... 17
Figure 5 A capacitor of 47pF is recommended at the output pin of all op amps............................................ 18
Figure 6 SYNC timing..................................................................................................................................... 19
Figure 7 Gatekill timing................................................................................................................................... 20
Figure 8 ITRIP timing...................................................................................................................................... 20
Figure 9 Interrupt timing ................................................................................................................................. 21
Figure 10 I
2
C Timing....................................................................................................................................... 21
Figure 11 SPI write timing .............................................................................................................................. 22
Figure 12 SPI read timing............................................................................................................................... 23
Figure 13 UART timing ................................................................................................................................... 24
Figure 14 CAPTURE timing............................................................................................................................ 25
Figure 15 OTP programming timing ............................................................................................................... 26
Figure 16 JTAG timing.................................................................................................................................... 27
Figure 17 PWMUL/PWMUH/PWMVL/PWMVH/PWMWL/PWMWH output ................................................... 28
Figure 18 All digital I/O except motor PWM output ........................................................................................ 28
Figure 19 RESET, GATEKILL I/O .................................................................................................................. 29
Figure 20 Analog input ................................................................................................................................... 29
Figure 21 Analog operational amplifier output and AREF I/O structure ...................................................... 29
Figure 22 VPP programming pin I/O structure ............................................................................................... 30
Figure 23 VSS and AVSS pin structure.......................................................................................................... 30
Figure 24 VDD1 and VDDCAP pin structure.................................................................................................. 30
Figure 25 XTAL0/XTAL1 pins structure.......................................................................................................... 30
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
4
IRMCK171
1 Overview
IRMCK171 is a new generation International Rectifier integrated circuit device primarily designed as a one-
chip solution for complete inverter controlled appliance motor control applications. Unlike a traditional
microcontroller or DSP, the IRMCK171 provides a built-in closed loop sensorless control algorithm using
the unique flexible Motion Control Engine (MCE
TM
) for permanent magnet motors as well as induction
motors. The MCE
TM
consists of a collection of control elements, motion peripherals, a dedicated motion
control sequencer and dual port RAM to map internal signal nodes. IRMCK171 also employs a unique
single shunt current reconstruction circuit in addition to two leg shunt current sensing circuit to eliminate
additional analog/digital circuitry and enables a direct shunt resistor interface to the IC. Motion control
programming is achieved using a dedicated graphical compiler integrated into the MATLAB/Simulink
TM
development environment. Sequencing, user interface, host communication, and upper layer control tasks
can be implemented in the 8051 high-speed 8-bit microcontroller. The 8051 microcontroller is equipped with
a JTAG port to facilitate emulation and debugging tools. Figure 1 shows a typical application schematic
using the IRMCK171.
IRMCK171 contains 32K bytes of OTP program ROM, The IRMCF171 contains 64K bytes of Flash RAM
and intended for development purposes only while the IRMCK171 is intended for volume production. Both
the development and ROM versions come in a 48-pin QFP package with identical pin configuration to
facilitate PC board layout and transition to mass production.
Figure 1 Typical Application Block Diagram Using IRMCK171
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
5
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