MIC2184
Micrel, Inc.
MIC2184
Low Voltage Buck PWM Control IC
General Description
Micrel’s MIC2184 is a high efficiency PWM buck control IC.
With its wide input voltage range of 2.9V to 14V, the MIC2184
can be used to efficiently step voltages down in 1- or 2-cell Li
Ion battery powered applications, as well as in fixed 3.3V, 5V,
or 12V systems.
Efficiencies over 90% are achievable over a wide range of
load conditions with the MIC2184’s PWM control scheme.
The operating frequency can be divided by two by raising the
FREQ/2 pin to V
DD
. This allows the user to optimize efficiency
versus board space. It also allows the MIC2184 to be exter-
nally synchronized to frequencies below its nominal 400KHz.
The MIC2184 features an oscillator output, FreqOut, which
can be used to implement a simple charge pump in low
voltage applications. The output of the charge pump can be
fed into the gate drive power circuitry via the V
IN
P pin,
allowing enhanced gate drive, hence higher efficiencies,
despite low input voltages.
MIC2184 features a 1µA shutdown mode, and a program-
mable undervoltage lockout, making it well suited for portable
applications.
The MIC2184 is available in 16 pin SOP and QSOP package
options with a junction temperture range range from –40°C
to +125°C.
Features
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Input voltage range: 2.9V to 14V
>90% efficiency
Oscillator frequency of 400kHz
Frequency divide-by-two pin
Frequency sync to 600kHz
FrequOut oscillator output allows simple charge pump
implementation in low voltage systems
1.245V reference output
Front edge blanking
5Ω output driver
Soft start
PWM current mode control
1µA shutdown current
Cycle-by-cycle current limiting
Frequency foldback short circuit protection
Adjustable under-voltage lockout
16 pin narrow-body SOIC and QSOP package options
3.3V to 2.5V/1.8V/1.5V conversion
DC power distribution systems
Wireless Modems
ADSL line cards
1-and 2-cell Li Ion battery operated equipment
Satellite Phones
Applications
Typical Application
V
IN
= 3.3V
16
120µF (x2)
6.3V
VINP
1
7
2
16
10
4
3
13
15mΩ
CSH
CSL
OUTP
9
8
14
MIC2184 EFFICIENCY
100
95
VINA
EN/UVLO
FreqOut
FREQ/2
VDD
COMP
SS
VREF
SYNC
11
Q3
Si9803DY(x2)
4.7µH
EFFICIENCY (%)
90
85
80
75
70
65
60
55
50
0
MIC2184
V
OUT
2.5V @5A
PGND
FB
SGND
5
12
6
220µF(x2)
6.3V
V
IN
= 3.3V
V
OUT
= 2.5V
f
S
= 200kHz
1
2
3
4
OUTPUT CURRENT (A)
5
Adjustable Output Buck Converter
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2005
1
M9999-042205
MIC2184
Micrel, Inc.
Ordering Information
Part Number
Standard
Pb-Free
MIC2184BM
MIC2184BQS
MIC2184YM
MIC2184YQS
Output
Voltage
Adj.
Adj.
Frequency
400KHz
400KHz
Junction
Temp. Range
–40°C to +125°C
–40°C to +125°C
Package
16-lead SOP
16-lead QSOP
Pin Configuration
VINA 1
FreqOut 2
SS 3
COMP 4
SGND 5
FB 6
EN/UVLO 7
CSL 8
16 VINP
15 FREQ/2
14 OUTP
13 VREF
12 PGND
11 SYNC
10 VDD
9 CSH
16 Lead SOIC
(M)
M9999-042205
2
April 2005
MIC2184
Micrel, Inc.
Pin Description
Pin Number
1
Pin Name
VINA
Pin Function
Analog voltage input voltage to the circuit. This powers up the analog
sections of the die and does not need to be the same voltage as Pin 16
(V
IN
P).
This provides a digital signal output signal at half the switching frequency.
This signal swings from 0 to 3V, and can be used to drive an external
capacitive doubler to provide a higher voltage to the V
IN
P input.
Soft start reduces the inrush current and delays and slows the output voltage
rise time. A 5µA current source will charge the capacitor up to V
DD
. A 1µF
capacitor will soft start the switching regulator in 1.5ms.
Compensation (Output): Internal error amplifier output. Connect to a
capacitor or series RC network to compensate the regulator’s control loop.
Small signal ground: must be routed separately from other grounds to the (-)
terminal of C
OUT
.
Feedback Input - the circuit regulates this pin to 1.245V.
Enable/UnderVoltage Lockout (input): A low level on this pin will power down
the device, reducing the quiescent current to under 5uA. This pin has two
separate thresholds, below 1.5V the output switching is disabled, and below
0.9V the part is forced into a complete micropower shutdown. The 1.5V
threshold functions as an accurate undervoltage lockout (UVLO) with 140mV
hysteresis.
The (-) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (-) input to the current
amplifier.
The (+) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (+) input to the current
amplifier.
3V internal linear-regulator output. V
DD
is also the supply voltage bus for the
chip. Bypass to SGND with 1µF.
Frequency Synchronization (Input): Connect an external clock signal to
synchronize the oscillator. Leading edge of signal above 1.5V starts the
switching cycle. Connect to SGND if not used.
MOSFET driver power ground, connects to source of synchronous MOSFET
and the (-) terminal of CIN.
The 1.245V voltage reference is available on this pin. A 0.1µF capacitor
should be connected from this pin to ground.
High current drive for high side P channel MOSFET. Voltage swing is from
ground to V
IN
P. On-resistance is typically 2.5Ω.
When this is low, the oscillator frequency is 400KHz. When this pin is raised
to V
DD
, the oscillator frequency is 200KHz.
Power Input voltage to the circuit. The output gate drivers are powered from
this supply. The current sense resistor R
CS
should be connected as close as
possible to this pin.
2
FreqOut
3
SS
4
5
6
7
COMP
SGND
FB
EN/UVLO
8
CSL
9
CSH
10
11
VDD
SYNC
12
13
14
15
16
PGND
VREF
OUTP
FREQ/2
VINP
April 2005
3
M9999-042205
MIC2184
Micrel, Inc.
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
IN
A, V
IN
P) ......................................... 15V
Digital Supply Voltage (V
DD
) ........................................... 7V
Comp Pin Voltage (V
COMP
) ............................ –0.3V to +3V
Feedback Pin Voltage (V
FB
) .......................... –0.3V to +3V
Enable Pin Voltage (V
EN/UVLO
) ..................... –0.3V to 15V
Current Sense Voltage (V
CSH–
V
CSL
) ............... –0.3V to 1V
Sync Pin Voltage (V
SYNC
) ................................ –0.3V to 7V
Freq/2 Pin Voltage (V
FREQ/2
) ............................ -0.3V to 7V
Power Dissipation (P
D
)
16 lead SOIC ................................. 400mW @ T
A
= 85°C
16 lead QSOP ............................... 245mW @ T
A
= 80°C
Ambient Storage Temp ............................ –65°C to +150°C
ESD Rating, .............................................................
Note 3
Operating Ratings
(Note 2)
Supply Voltage (V
IN
A, V
IN
P) ........................ +2.9V to +14V
Ambient Operating Temperature ......... –40°C
≤
T
A
≤
+85°C
Junction Temperature ....................... –40°C
≤
T
J
≤
+125°C
Output Voltage Range ...................................... 1.3V to 12V
PackageThermal Resistance
θ
JA
16-lead SOP ............................................... 100°C/W
θ
JA
16-lead QSOP ............................................. 163°C/W
Electrical Characteristics
V
IN
A = V
IN
P = V
CSH
= 5V, V
OUT
= 3.3V, V
EN/UVLO
= 5V, V
FREQ/2
= 0V, T
J
= 25ºC, unless otherwise specified.
Bold
values indicate
–40ºC < T
J
< +125ºC.
Parameter
Regulation
Feedback Voltage Reference
(±1%)
(±2%)
Feedback Bias Current
Output Voltage Line Regulation
Output Voltage Load Regulation
Output Voltage Total Regulation
Input & V
DD
Supply
V
IN
A Input Current
V
IN
P Input Current,
Note 4
Shutdown Quiescent Current
Digital Supply Voltage (V
DD
)
Digital Supply load regulation
Undervoltage Lockout
UVLO Hysteresis
Reference Output(VREF)
Reference Voltage
(±1.5%)
(±2.5%)
Reference Voltage Line
Regulation
Reference Voltage Load
Regulation
Enable/UVLO
Enable Input Threshold
UVLO Threshold
UVLO Hysteresis
Enable Input Current
V
EN/UVLO
= 5V
(Turn-on threshold)
0.6
1.4
0.9
1.5
140
0.2
5
1.2
1.6
V
V
mV
µA
5V < V
IN
A < 12V
0 < I
REF
< 100µA
1.226
1.213
2
1
1.245
1.264
1.276
V
V
mV
mV
(Excluding external MOSFET gate current)
V
EN/UVLO
= 0V; (I
VINA
+ I
VINP
)
I
L
= 0
I
L
= 0 to 1mA
V
DD
upper threshold (turn on threshold)
2.82
0.7
1.0
0.5
3.0
0.03
2.75
100
5
3.18
mA
mA
µA
V
V
V
mV
5V
≤
V
IN
≤
12V
0mV < (V
CSH
– V
CSL
) < 75mV
5V
≤
V
IN
A
≤
12V, 0mV < (V
CSH
– V
CSL
) < 75mV (±3%)
1.208
1.233
1.22
50
0.04
0.9
1.282
1.245
1.257
1.27
V
V
nA
%/V
%
V
Condition
Min
Typ
Max
Units
M9999-042205
4
April 2005
MIC2184
Parameter
Soft Start
Soft Start Current
Current Limit
Current Limit Threshold Voltage
Error Amplifier
Error Amplifier Gain
Current Amplifier
Current Amplifier Gain
Oscillator Section
Oscillator Frequency (f
O
)
Maximum Duty Cycle
Minimum On Time
Freq/2 Frequency (f
O
)
Frequency Foldback Threshold
Frequency Foldback Frequency
SYNC Threshold Level
SYNC Input Current
SYNC Minimum Pulse Width
SYNC Capture Range
FreqOut Output
FreqOut Frequency
FreqOut Current Drive
Note 6
Sink
Source
Gate Drivers
Rise/Fall Time
Output Driver Impedance
C
L
= 3300pF
Source; V
IN
P = 12V
Sink; V
IN
P = 12V
Source; V
IN
P = 5V
Sink; V
IN
P = 5V
Note 1:
Micrel, Inc.
Condiion
Min
Typ
Max
Units
5
µA
Voltage on CSH-CSL to trip current limit
100
mV
20
V/V
3.0
V/V
360
V
FB
= 1.0V
V
FB
= 1.5V
V
FREQ/2
= 5V
Measured on FB
170
100
400
440
kHz
%
185
200
0.3
90
0.6
1.4
0.1
200
2.2
5
230
ns
kHz
V
kHz
V
µA
ns
600
kHz
Note 5
f
O
+15 %
f
O
/ 2
8
–6
kHz
mA
mA
50
1.8
1.6
2.6
2.4
4
3.5
ns
Ω
Ω
Ω
Ω
Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when
operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction
temperature, T
J
(Max), the junction-to-ambient thermal resistance,
θ
JA
, and the ambient temperature, T
A
.
The device is not guaranteed to function outside its operating rating.
Devices are ESD sensitive. Handling precautions recommended.
See application information for I(V
IN
P) vs. V
IN
P.
See application information for limitations on maximum operating frequency.
The frequency on FreqOut is half the frequency of the oscillator, or half the frequency of the external Sync signal.
Note 2.
Note 3.
Note 4:
Note 5:
Note 6:
April 2005
5
M9999-042205
嵌入式系统
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