HD74LVCZ244A
Octal Buffers / Line Drivers with 3–state Outputs
REJ03D0371–0300
(Previous ADE-205-230A (Z))
Rev.3.00
Aug. 18, 2004
Description
The HD74LVCZ244A has eight line drivers with three state outputs in a 20 pin package. This device is a noninverting
buffer and has two active low enables (1G and 2G). Each enable independently controls four buffers.
When V
CC
is between 0 and 1.5 V, the device is in the high impedance state during power up or power down.
Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
•
•
•
•
•
•
•
•
•
V
CC
= 2.7 to 5.5 V
All inputs V
IH
(Max) = 5.5 V (@V
CC
= 0 to 5.5 V)
All outputs V
O
(Max) = 5.5 V (@V
CC
= 0 V or output off state)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High impedance state during power up and power down
Power off disables outputs, permitting live insertion
High output current ±24 mA (@V
CC
= 3.0 to 5.5 V)
Ordering Information
Package Type
SOP–20 pin (JEITA)
TSSOP–20 pin
Package Code
FP–20DAV
TTP–20DAV
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LVCZ244AFPEL
HD74LVCZ244ATELL
Function Table
Inputs
G
H
L
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
A
X
H
L
Output Y
Z
H
L
Rev.3.00 Aug. 18, 2004 page 1 of 8
HD74LVCZ244A
Pin Arrangement
1G 1
1A1
2Y4
2
3
20 V
CC
19 2G
18 1Y1
17 2A4
16 1Y2
15 2A3
14 1Y3
13 2A2
12 1Y4
11 2A1
1A2 4
2Y3
1A3
2Y2
1A4
2Y1
5
6
7
8
9
GND 10
(Top view)
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
, GND current
Storage temperature
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
Tstg
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V
CC
+0.5
–50
–50
±50
±100
–65 to 150
Unit
V
V
V
mA
mA
mA
mA
°C
Conditions
Output “Z” or V
CC
: OFF
Output “H” or “L”
V
I
< 0
V
O
< 0
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.3.00 Aug. 18, 2004 page 2 of 8
HD74LVCZ244A
Recommended Operating Conditions
Item
Supply voltage
Input voltage
Output voltage
Output current
Symbol
V
CC
V
I
V
O
I
OH
I
OL
Input rise / fall time
Operating temperature
Note:
1. Duty cycle
≤
50%
t
r
, t
f
Ta
Ratings
2.7 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
–12
–24
*1
12
24
*1
0 to 6
–40 to +85
Unit
V
V
V
mA
mA
ns / V
°C
Conditions
At operation
Output “Z” or V
CC
: OFF
Output “H” or “L”
V
CC
= 2.7 V
V
CC
= 3.0 to 5.5 V
V
CC
= 2.7 V
V
CC
= 3.0 to 5.5 V
Logic Diagram
1G
1A1
1
2G
18
19
2
1Y1
2A1
11
9
2Y1
1A2
4
16
1Y2
2A2
13
7
2Y2
1A3
6
14
1Y3
2A3
15
5
2Y3
1A4
8
12
1Y4
2A4
17
3
2Y4
Rev.3.00 Aug. 18, 2004 page 3 of 8
HD74LVCZ244A
Electrical Characteristics
(Ta = –40 to 85°C)
Item
Input voltage
Symbol
V
IH
V
IL
Output voltage
V
OH
V
CC
(V)
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 5.5
2.7
3.0
3.0
4.5
2.7 to 5.5
2.7
3.0
4.5
0 to 5.5
2.7 to 5.5
0 to 1.5
1.5 to 0
0
2.7 to 3.6
2.7 to 5.5
2.7 to 3.6
3.3
3.3
Min
2.0
V
CC
×0.7
—
—
V
CC
–0.2
2.2
2.4
2.2
3.8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3.4
7.5
Max
—
—
0.8
V
CC
×0.3
—
—
—
—
—
0.2
0.4
0.55
0.55
±5
±5
±5
±5
±5
225
350
500
—
—
Unit
V
V
V
I
OH
= –100
µA
I
OH
= –12 mA
I
OH
= –24 mA
V
I
OL
= 100
µA
I
OL
= 12 mA
I
OL
= 24 mA
V
IN
= 0 to 5.5 V
V
OUT
= 0 to 5.5 V
V
OUT
= 0.5 to 5.5 V,
Output enable = don’t care
V
IN
or V
O
= 5.5 V
V
IN
= 3.6 to 5.5 V
*1
, I
O
= 0
V
IN
= V
CC
or GND
V
IN
= one input at (V
CC
–0.6) V,
other inputs at V
CC
or GND
V
IN
= V
CC
or GND
V
OUT
= V
CC
or GND
Test Conditions
V
OL
Input current
Off state output
current
Output leak current
Quiescent supply
current
I
IN
I
OZ
I
OZPU
I
OZPD
I
OFF
I
CC
∆I
CC
µA
µA
µA
µA
µA
pF
pF
Input capacitance
Output capacitance
Note:
C
IN
C
O
1. This applies in the disabled state only.
Switching Characteristics
(Ta = –40 to 85°C)
FROM
TO
(Input)
(Output)
A
Y
Item
Propagation delay time
Symbol
t
PLH
t
PHL
t
ZH
t
ZL
t
HZ
t
LZ
V
CC
(V)
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
2.7
3.3±0.3
5.0±0.5
Min
—
1.5
—
—
1.5
—
—
1.5
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
Max
6.9
5.9
4.5
8.6
7.6
6.1
6.8
6.5
5.5
—
1.0
1.0
Unit
ns
Output enable time
ns
G
Y
Output disable time
ns
G
Y
Between output pin skew
*1
t
OSLH
t
OSHL
Note:
ns
1. This parameter is characterized but not tested.
t
OSLH
= |t
PLHm
–t
PLHn
|, t
OSHL
= |t
PHLm
–t
PHLn
|
Rev.3.00 Aug. 18, 2004 page 4 of 8
HD74LVCZ244A
Test Circuit
V
CC
V
CC
Output
1G, 2G
Input
Pulse generator
Z
out
= 50
Ω
500
Ω
1Y1 to 2Y4
1A1 to 2A4
C
L
=
50 pF
450
Ω
50
Ω
Scope
See Function Table
S1
*1
OPEN
See
under table
GND
Symbol
t
PLH
/ t
PHL
t
ZH
/ t
HZ
t
ZL
/ t
LZ
Note: 1. C
L
includes probe and jig capacitance.
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
OPEN
GND
6V
OPEN
GND
2×V
CC
Rev.3.00 Aug. 18, 2004 page 5 of 8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
