Crystal Oscillator accepts a 0 to 3V input voltage
to cause the output clocks to vary by
±100
ppm.
Using MicroClock’s patented VCXO and analog
Phase-Locked Loop (PLL) techniques, the device
uses an inexpensive 14.31818 MHz crystal input to
produce multiple output clocks. All clocks are
frequency locked to the 27.00MHz output (and to
each other) with zero ppm error.
MicroClock manufactures the largest variety of
Set-Top Box and multimedia clock synthesizers
for all applications. Consult MicroClock to
eliminate VCXOs, crystals and oscillators from
your board.
MK2771-05
VCXO and Set-Top Clock Source
Features
• Packaged in 20 pin SOIC
• Uses an inexpensive 14.31818 MHz crystal
• On-chip patented VCXO with pull range
of 200ppm (typical)
• VCXO tuning voltage of 0 to 3V
• Zero ppm synthesis error (patented) in all
clocks. All exactly track 27MHz VCXO
• All clocks are frequency locked. All will vary the
same amount (in ppm) as the VCXO
• Selectable Processor clock
• Selectable Audio clock
• 25mA output drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 5V operating voltage
Block Diagram
AVDD VDD GND
3
4
2
Clock
Synthesis
Circuitry
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
Voltage
Controlled
Crystal
Oscillator
Output
Buffers
Processor Clock
16.0000 MHz
22.5792 MHz
or 24.576 MHz
27.000 MHz
PCS1:0
ACS
VIN
14.31818 MHz
pullable
crystal
X1
X2
14.31818 MHz
1
Revision 2038
Printed 11/8/99
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS2771-05B
ICRO
C
LOCK
Pin Assignment
PCS0
X2
X1
AVDD
VIN
VDD
GND
PCLK
ACLK
VDD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PCS1
ACS
27M
GND
14.3M
VDD
GND
DC
16.0M
GND
MK2771-05
VCXO and Set-Top Clock Source
Processor Clock
PCS1 PCS0 PCLK (MHz)
0
0
32
0
1
39.5
1
0 Tri-state PCLK
1
1
50
Audio Clock
ACS
0
1
ACLK (MHz)
22.5792
24.576
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
PCS0
X2
X1
AVDD
VIN
VDD
GND
PCLK
ACLK
VDD
GND
16.0M
DC
GND
VDD
14.3M
GND
27M
ACS
PCS1
Type
I
O
I
P
VI
P
P
O
O
P
P
O
-
P
P
O
P
O
TI
TI
Description
Processor Clock Select 0. Determines PCLK frequency, as per table above.
Crystal connection. Connect to a pullable 14.31818 MHz crystal.
Crystal connection. Connect to a pullable 14.31818 MHz crystal.
Connect to +5V, and other VDDs.
Voltage Input to VCXO. Zero to 3V signal which controls the frequency of the VCXO.
Connect to +5V.
Connect to ground.
Processor Clock Output determined by PCS1 and PCS0, as per table above.
Audio Clock Output determined by ACS, as per table above.
Connect to +5V.
Connect to ground.
16.0000 MHz clock output.
Do Not Connect.
Connect to ground.
Connect to +5V.
14.31818 MHz clock output.
Connect to ground.
27.00 MHz clock output.
Audio Clock Select. Determines ACLK frequency, as per table above.
Processor Clock Select 1. Determines PCLK frequency, as per table above.
Key: I = Input, TI = Tri-level input, VI = VCXO input, O = output, P = power supply connection
2
Revision 2038
Printed 11/8/99
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS2771-05B
ICRO
C
LOCK
Electrical Specifications
Parameter
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Operating Voltage, VDD
Input High Voltage, VIH, X1 pin only
Input Low Voltage, VIL, X1 pin only
Input High Voltage, VIH (ACS,PCS1)
Input High Voltage, VIH (PCS0)
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Short Circuit Current
Input Capacitance
Frequency synthesis error
VIN, VCXO control voltage
Conditions
MK2771-05
VCXO and Set-Top Clock Source
Minimum
Typical
Maximum
7
VDD+0.5
70
260
150
5.25
2.5
2.5
1.5
Units
V
V
°C
°C
°C
V
V
V
V
V
V
V
V
V
mA
mA
pF
ppm
V
ABSOLUTE MAXIMUM RATINGS (note 1)
n
Referenced to GND
Referenced to GND
Max of 10 seconds
-65
4.75
3.5
VDD-0.5
2
0.8
IOH=-25mA
IOL=25mA
IOH=-8mA
No Load, note 2
Each output
All clocks as shown
0
2.4
0.4
VDD-0.4
60
±100
7
0
-0.5
0
DC CHARACTERISTICS (VDD = 5.0V unless noted)
V
1
3
AC CHARACTERISTICS (VDD = 5.0V unless noted)
V
Input Crystal Frequency
14.31818
MHz
Input Crystal Accuracy
±30
ppm
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At 1.4V
40
60
%
Maximum Absolute Jitter, short term
300
ps
27 MHz output pullability, note 3
0V
≤
VIN
≤
3V
±100
ppm
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With ACLK at 22.5792 MHz and PCLK at 50 MHz.
3. With a
±150ppm
pullable cr stal.
External Components/Cr stal Selection
The MK2771-05 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.1µF
should be connected between VDD (pin 15) and GND (14), and betweeen AVDD (4) and GND (7), as close to the MK2771-05 as
possible. A series termination resistor of 33
Ω
may be used for each clock output. The input crystal must be connected as close to the
chip as possible. The 14.31818 MHz input crystal should be a parallel mode, pullable, AT cut with 16.0pF load capacitance. Consult
MicroClock for recommended suppliers. Only the crystal should be connected to X1 and X2 - do not connect external load
capacitors to the crystal pins. Do not connect the crystal case (can) to ground, and do not place a ground plane underneath the crytal
traces connected to pins 2 and 3. Refer to MicroClock Application Note MAN05 for additional information.
3
Revision 2038
Printed 11/8/99
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MDS2771-05B
ICRO
C
LOCK
Package Outline and Package Dimensions
MK2771-05
VCXO and Set-Top Clock Source
20 pin SOIC
Symbol
A
b
c
D
E
H
e
h
Q
Inches
c
Min
Max
0.092 0.104
0.014 0.019
0.009 0.012
0.490 0.512
0.290 0.300
0.394 0.419
.050 BSC
S
0.016
0.003 0.011
Millimeters
i
Min
Max
2.3368 2.6416
0.356
0.483
0.229
0.305
12.446 13.005
7.366
7.620
10.008 10.643
1.27 BSC
S
0.406
0.076
0.279
E
H
D
Q
e
b
c
h x 45°
A
Ordering Information
Part/Order Number
MK2771-05S
MK2771-05STR
Marking
MK2771-05S
MK2771-05S
Shipping packaging
tubes
tape and reel
Package
20 pin SOIC
20 pin SOIC
Temperature
0-70°C
0-70°C
While the information presented herein has been checked for both accuracy and reliability, MicroClock Incorporated assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by MicroClock. MicroClock reserves the right to change any circuitry or specifications without notice. MicroClock does not
authorize or warrant any MicroClock product for use in life support devices or critical medical instruments.
4
Revision 2038
Printed 11/8/99
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
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