Advanced Power MOSFET
FEATURES
½
Avalanche Rugged Technology
½
Rugged Gate Oxide Technology
½
Lower Input Capacitance
½
Improved Gate Charge
½
Extended Safe Operating Area
½
Lower Leakage Current : -10
µA
(Max.) @ V
DS
= -250V
½
Low R
DS(ON)
: 3.5
Ω
(Typ.)
1
2
3
SFP9614
BV
DSS
= -250 V
R
DS(on)
= 4.0
Ω
I
D
= -1. 6 A
TO-220
1.Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
Characteristic
Drain-to-Source Voltage
Continuous Drain Current (T
C
=25 C)
Continuous Drain Current (T
C
=100 C)
Drain Current-Pulsed
Gate-to-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation (T
C
=25 C)
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Maximum Lead Temp. for Soldering
Purposes, 1/8 “ from case for 5-seconds
o
2
O
1
O
1
O
3
O
o
o
Value
-250
-1.6
-1.0
1
O
Units
V
A
A
V
mJ
A
mJ
V/ns
W
W/ C
o
-6.5
+ 30
_
112
-1.6
2.0
-4.8
20
0.16
- 55 to +150
o
C
300
Thermal Resistance
Symbol
R
θJC
R
θCS
R
θJA
Characteristic
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
Typ.
--
0.5
--
Max.
6.25
--
62.5
o
Units
C/W
Rev. B1
2001
Fairchild Semiconductor Corporation
SFP9614
Electrical Characteristics
(T
C
=25
o
C unless otherwise specified)
Symbol
BV
DSS
∆BV/∆T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Characteristic
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain( “Miller” ) Charge
Min. Typ. Max. Units
-250
--
-2.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
-0.21
--
--
--
--
--
--
1.0
225
35
13
10
18
24
11
9
2.0
4.6
--
--
-4.0
-100
100
-10
-100
4.0
--
295
55
20
30
45
60
30
11
--
--
nC
ns
pF
µA
Ω
S
V
o
P-CHANNEL
POWER MOSFET
Test Condition
V
GS
=0V,I
D
=-250µA
See Fig 7
V
DS
=-5V,I
D
=-250µA
V
GS
=-30V
V
GS
=30V
V
DS
=-250V
V
DS
=-200V,T
C
=125 C
V
GS
=-10V,I
D
=-0.8A
V
DS
=-40V,I
D
=-0.8A
4
O
4
O
o
V/ C I
D
=-250µA
V
nA
V
GS
=0V,V
DS
=-25V,f =1MHz
See Fig 5
V
DD
=-125V,I
D
=-1.6A,
R
G
=24Ω
See Fig 13
4
5
OO
V
DS
=-200V,V
GS
=-10V,
I
D
=-1.6A
See Fig 6 & Fig 12
4
5
OO
Source-Drain Diode Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Characteristic
Continuous Source Current
Pulsed-Source Current
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
1
O
4
O
Min. Typ. Max. Units
--
--
--
--
--
--
--
--
130
0.61
-1.6
-6.5
-4.0
--
--
A
V
ns
µC
Test Condition
Integral reverse pn-diode
in the MOSFET
T
J
=25 C,I
S
=-1.6A,V
GS
=0V
T
J
=25 C,I
F
=-1.6A
di
F
/dt=100A/µs
4
O
o
o
Notes ;
1
O
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2
O
L=70mH, I
AS
=-1.6A, V
DD
=-50V, R
G
=27Ω
*
, Starting T
J
=25
o
C
3
_
_
_
O
I
SD
<
-1.6A, di/dt
<
250A/µs, V
DD
<
BV
DSS
, Starting T
J
=25
o
C
_
4
O
Pulse Test : Pulse Width = 250µs, Duty Cycle
<
2%
5
O
Essentially Independent of Operating Temperature
P-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics
V
GS
-15 V
-10 V
-8.0 V
-7.0 V
-6.0 V
-5.5 V
-5.0 V
Bottom : -4.5 V
Top :
SFP9614
Fig 2. Transfer Characteristics
[A]
[A]
-I
D
, Drain Current
10
0
-I
D
, Drain Current
10
0
150 C
10
-1
o
10
-1
25 C
- 55 C
o
o
@ Notes :
1. 250
µ
s Pulse Test
2. T
C
= 25 C
-2
o
@ Notes :
1. V
GS
= 0 V
2. V
DS
= -40 V
3. 250
µ
s Pulse Test
8
10
10
10
-1
-2
10
10
0
10
1
2
4
6
-V
DS
, Drain-Source Voltage
[V]
-V
GS
, Gate-Source Voltage
[V]
12
R
DS(on)
, [
Ω
]
Drain-Source On-Resistance
10
-I
DR
, Reverse Drain Current
[A]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
8
10
0
V
GS
= -10 V
6
150 C
10
-1
o
4
V
GS
= -20 V
@ Note : T
J
= 25 C
0
0
1
2
3
4
5
6
o
25 C
@ Notes :
1. V
GS
= 0 V
2. 250
µ
s Pulse Test
o
2
10
-2
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
-I
D
, Drain Current
[A]
-V
SD
, Source-Drain Voltage
[V]
Fig 5. Capacitance vs. Drain-Source Voltage
40
0
C =C +C (C =sotd)
iss gs gd
ds
h r e
C =C +C
oss ds gd
C =C
rss gd
12
Fig 6. Gate Charge vs. Gate-Source Voltage
V
DS
= -50 V
10
V
DS
= -125 V
V
DS
= -200 V
8
30
0
C
iss
20
0
C
oss
@Nts:
oe
1 V =0V
.
GS
2 f=1Mz
.
H
-V
GS
, Gate-Source Voltage
Capacitance [pF]
[V]
6
10
0
C
rss
4
2
@ Notes : I
D
= -1.6 A
0
0
2
4
6
8
10
0
0
1
0
1
1
0
-V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge
[nC]
SFP9614
Fig 7. Breakdown Voltage vs. Temperature
-BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
1.2
2.5
P-CHANNEL
POWER MOSFET
Fig 8. On-Resistance vs. Temperature
R
DS(on)
, (Normalized)
Drain-Source On-Resistance
2.0
1.1
1.5
1.0
1.0
@ Notes :
1. V
GS
= -10 V
2. I
D
= -0.8 A
0.9
@ Notes :
1. V
GS
= 0 V
2. I
D
= -250
µ
A
0.5
0.8
-75
-50
-25
0
25
50
75
100
125
150
175
0.0
-75
-50
-25
0
25
50
75
100
125
150
175
T
J
, Junction Temperature
[ C]
o
T
J
, Junction Temperature
[ C]
o
Fig 9. Max. Safe Operating Area
-I
D
, Drain Current [A]
Oeaini Ti Ae
prto n hs ra
i L m t d b R
DS(on)
s iie y
1
1
0
01m
. s
1m
s
1
0
0
D
C
@Nts:
oe
1 T = 2
o
C
.
C
5
2 T = 1 0
o
C
.
J
5
3 Snl Ple
. ige us
1 m
0 s
Fig 10. Max. Drain Current vs. Case Temperature
20
.
-I
D
, Drain Current [A]
16
.
12
.
08
.
1
-1
0
04
.
1
-2 0
0
1
0
1
1
0
1
2
0
00
.
2
5
5
0
7
5
10
0
o
15
2
10
5
-V
DS
, Drain-Source Voltage [V]
T
c
, Case Temperature [ C]
Fig 11. Thermal Response
Thermal Response
D=0.5
@ Notes :
1. Z
θ
J C
(t)=6.25
o
C/W Max.
2. Duty Factor, D=t
1
/t
2
3. T
J M
-T
C
=P
D M
*Z
θ
J C
(t)
P
.
DM
t
1.
t
2.
0.2
10
0
0.1
0.05
Z (t) ,
0.02
0.01
10
- 1
single pulse
θ
JC
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
10
0
10
1
t
1
, Square Wave Pulse Duration
[sec]
P-CHANNEL
POWER MOSFET
Fig 12. Gate Charge Test Circuit & Waveform
SFP9614
“ Current Regulator ”
50KΩ
12V
200nF
300nF
Same Type
as DUT
V
GS
Q
g
-10V
V
DS
V
GS
DUT
-3mA
Q
gs
Q
gd
R
1
Current Sampling (I
G
)
Resistor
R
2
Current Sampling (I
D
)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
R
L
V
out
V
in
R
G
DUT
-10V
V
out
90%
t
on
t
off
t
r
t
d(off)
t
f
V
DD
( 0.5 rated V
DS
)
t
d(on)
V
in
10%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
L
V
DS
Vary t
p
to obtain
required peak I
D
BV
DSS
1
E
AS
= ---- L
L
I
AS2
--------------------
2
BV
DSS
-- V
DD
t
p
I
D
V
DD
Time
V
DS
(t)
R
G
DUT
-10V
t
p
C
V
DD
I
AS
BV
DSS
I
D
(t)