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IDT74AUC32245BFI

产品描述Bus Transceiver, AUC Series, 32-Func, 1-Bit, True Output, CMOS, PBGA96, LFBGA-96
产品类别逻辑    逻辑   
文件大小119KB,共7页
制造商IDT (Integrated Device Technology)
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IDT74AUC32245BFI概述

Bus Transceiver, AUC Series, 32-Func, 1-Bit, True Output, CMOS, PBGA96, LFBGA-96

IDT74AUC32245BFI规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码BGA
包装说明LFBGA-96
针数96
Reach Compliance Codenot_compliant
控制类型COMMON CONTROL
计数方向BIDIRECTIONAL
系列AUC
JESD-30 代码R-PBGA-B96
JESD-609代码e0
长度13.5 mm
负载电容(CL)15 pF
逻辑集成电路类型BUS TRANSCEIVER
最大I(ol)0.0001 A
湿度敏感等级3
位数1
功能数量32
端口数量2
端子数量96
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码LFBGA
封装等效代码BGA96,6X16,32
封装形状RECTANGULAR
封装形式GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度)NOT SPECIFIED
电源0.8/2.7 V
Prop。Delay @ Nom-Sup3.1 ns
传播延迟(tpd)3.1 ns
认证状态Not Qualified
座面最大高度1.5 mm
最大供电电压 (Vsup)2.7 V
最小供电电压 (Vsup)0.8 V
标称供电电压 (Vsup)1.8 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn63Pb37)
端子形式BALL
端子节距0.8 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度5.5 mm

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IDT74AUC32245
1.8V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
1.8V CMOS 32-BIT BUS
TRANSCEIVER WITH
3-STATE OUTPUTS
FEATURES:
DESCRIPTION:
IDT74AUC32245
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• 1.8V Optimized
• 0.8V to 2.7V Operating Range
• Inputs/outputs tolerant up to 3.6V
• Output drivers: ±8mA @ V
DD
= 1.8V
• Supports hot insertion
• Available in 96-ball LFBGA package
APPLICATIONS:
• High performance, low voltage communications systems
• High performance, low voltage computing systems
This 32-bit bus transceiver is built using advanced CMOS technology. The
AUC32245 is designed specifically for asynchronous communications between
data buses. The control function implementation minimizes external timing
requirements.
This device can be used as one 32-bit transceiver, two 16-bit transceivers,
or four 8-bit transceivers. It allows data transmission from A bus to B bus or from
B bus to A bus, depending on the logic level at the direction-control (DIR) input.
The output-enable (OE) input can be used to disable the device so that the buses
are effectively isolated.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the outputs, preventing damaging current backflow
through the device when it is powered down.
The AUC32245 is designed with a ±9mA output driver. This driver is capable
of driving a moderate load while maintaining speed performance.
To ensure the high-impedance state during power up or power down,
OE
should be tied to V
DD
through a pull-up resistor; the minimum value of the resistor
is determined by the current-sinking capability of the driver.
FUNCTIONAL BLOCK DIAGRAM
1
DIR
A3
A4
3
DIR
1
OE
J3
J4
3
OE
1
A
1
A5
A2
3
A
1
1
B
1
J5
J2
3
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
2
DIR
H3
H4
4
DIR
2
OE
T3
T4
4
OE
4
A
1
N5
N2
2
A
1
E5
E2
2
B
1
4
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2003 Integrated Device Technology, Inc.
MARCH 2003
DSC-6374/1

 
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