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Information furnished in this publication is preliminary and subject to changes without notice.
1/58
ZENTRUM MIKROELEKTRONIK DRESDEN AG
Datasheet
SAP5S / SAP51
Table of Contents
0
0.1
0.2
0.3
1
Page
READ THIS FIRST.......................................................................................................................................... 4
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The
Information furnished in this publication is preliminary and subject to changes without notice.
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The
Information furnished in this publication is preliminary and subject to changes without notice.
3/58
ZENTRUM MIKROELEKTRONIK DRESDEN AG
Datasheet
SAP5S / SAP51
0
0.1
Read this First
Important Notice
Products sold by ZMD are covered exclusively by the warranty, patent indemnification and other provisions ap-
pearing in ZMD standard "Terms of Sale". ZMD makes no warranty (express, statutory, implied and/or by de-
scription), including without limitation any warranties of merchantability and/or fitness for a particular purpose,
regarding the information set forth in the Materials pertaining to ZMD products, or regarding the freedom of any
products described in the Materials from patent and/or other infringement. ZMD reserves the right to discontinue
production and change specifications and prices of its products at any time and without notice. ZMD products
are intended for use in commercial applications. Applications requiring extended temperature range, unusual
environmental requirements, or high reliability applications, such as military, medical life-support or life-
sustaining equipment, are specifically not recommended without additional mutually agreed upon processing by
ZMD for such applications.
ZMD reserves the right to change the detail specifications as may be required to permit improvements in the
design of its products.
0.2
References
[1] AS-Interface Complete Specification Version 3.0, dated 16.09.2004
[2] Spezifikation der sicheren AS-i-Übertragung, Leuze electronic, 12.05.2000
0.3
Revision History
Revision
B
C
C
C
C
C
Date
September 2005
March 2007
March 2007
March 2007
March 2007
March 2007
Technical Changes
First marketed silicon version
Modified I
IL
– current range for input low level
Page in Datasheet
Table 16 at Page 25
Modified Delay Mode activation through pa- Page 29
rameter port P1
Modified Synchronous Data I/O Mode activation Page 30
through parameter port P2
Modified Watchdog activation through parame- Page 40
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The
Information furnished in this publication is preliminary and subject to changes without notice.
4/58
ZENTRUM MIKROELEKTRONIK DRESDEN AG
Datasheet
SAP5S / SAP51
1
1.1
General Device Specification
Absolute Maximum Ratings (Non Operating)
Table 1: Absolute Maximum Ratings
Symbol
V
LTGN
V
LTGP-LTGN
Parameter
Voltage reference
Voltage difference between LTGP and LTGN (V
LTGP
-
V
LTGN
)
Min
0
0
0
-0.3
-0.3
-50
Max
0
40
50
V
UOUT
+ 0.3
7
50
Unit
V
V
V
V
V
mA
4
5
1
Note
V
LTGP-LTGN_P
Pulse voltage between LTGP and LTGN (V
LTGP
- V
LTGN
)
V
inputs1
V
inputs2
I
in
H
V
HBM
V
EDM
θ
STG
θ
lead
θ
lead
R
thj-16
R
thj-20
1
2
3
4
5
6
7
8
2
Voltage at pin CDC, D0…D3, P0…P3, DSTBn, PSTBnBn,
LED1, LED2, PFAULT, UOUT
Voltage at pins OSC1, OSC2, U5R
Input current into any pin except supply pins
Humidity non-condensing
Electrostatic discharge – Human Body Model (HBM2)
Electrostatic discharge – Equipment Discharge Model
(EDM)
Storage temperature
Soldering temperature Sn/Pb
Soldering temperature 100%Sn
Thermal resistance of SOIC 16 package
Thermal resistance of SOIC 20 package
1500
200
-55
125
V
V
°C
°C
°C
K/W
K/W
6
7
JEDEC-J-STD-020D
240
JEDEC-J-STD-020D
260
80
75
100
95
8
8
reverse polarity protection has to be performed externally,
pulse with
≤
50µs, repetition rate
≤
0.5 Hz
V
LTGP-LTGN
and V
LTGP-LTGN_P
must not be violated
Latch-up resistance, reference pin is 0V
Level 4 according to JEDEC-020D is guaranteed
HBM: C = 100pF charged to V
HBM2
with resistor R = 1.5kΩ in series, valid for all pins except LTGP-LTGN
EDM: C = 200pF charged to V
EDM
with no resistor in series, valid for LTGP-LTGN only
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The
Information furnished in this publication is preliminary and subject to changes without notice.
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