www.fairchildsemi.com
KH300
Wideband, High-Speed Operational Amplifier
Features
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General Description
The KH300 operational amplifier is a current feed-
back amplifier that provides a DC-85MHz -3dB band-
width that is virtually independent of gain setting.
Rise and fall times of 4ns and drive capability of
22V
pp
and 100mA add to the KH300’s impressive
specifications.
Using the KH300 is as easy as adding power supplies
and a gain-setting resistor. Unlike conventional op
amp designs in which optimum gain-bandwidth
product occurs at a high gain, minimum settling time
at a gain of -1, maximum slew rate at a gain of +1,
et cetera, the KH300 offers consistent performance
at gain settings from 1 to 40 inverting or non-inverting.
As a result, designing with the KH300 is greatly
simplified. And since no external compensation is
necessary, “tweeks” on the production line have been
eliminated, making the KH300 an efficient
component for use in production situations.
Flat gain and phase response from DC to 45MHz and
superior rise and fall times make the KH300 an ideal
amplifier for a broad range of pulse, analog, and
digital applications. A 45MHz full power bandwidth
(20V
pp
into 100Ω) and 3000V/µsec slew rate eliminate
the need for power buffers in many applications
such as driving “flash” A to D converters or line-
driving. For applications requiring lower power
consumption, the KH300 can operate on supplies as
low as ±5V. Fast overload recovery (20ns) helps
prevent loss of data in communications applications
and flat phase response reduces distortion, even when
data must be sent over extended lengths of line.
The KH300A is packaged in a side-brazed 24-pin
ceramic DIP and is specified at 25°C.
-3dB bandwidth of 85MHz
3000V/µsec slew rate
4ns rise and fall time
100mA output current
Low distortion, linear phase
Applications
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Digital communications
Baseband and video communications
Instrument input/output amplifiers
Fast A to D, D to A conversion
Graphic CRT video drive amp
Coaxial cable line driver
16
+V
CC
V+
6
+
12
V
o
V-
8
-
1500
11
R
f
13
24
-V
CC
GND
KH300 Equivalent Circuit Diagram
Pin 11 provides access to a 1500Ω feedback
resistor which can be connected to the out-
put or left open if an external feedback
resistor is desired. All undesignated pins are
internally unconnected.
REV. 1A February 2001
DATA SHEET
KH300
KH300 Electrical Characteristics
magnitude of gain {|V
out
/V
in
|]
PARAMETERS
Frequency Domain Response
-3dB bandwidth
gain flatness
phase shift
deviation from linear phase
reverse isolation
distortion
Time Domain Response
rise and fall time
CONDITIONS
(25°C, V
CC
= ±15V, R
L
= 100Ω; unless noted)
4*
TYP
105
45
±0.25
±0.5
1
2
60
MIN
75
2
20
TYP
85
45
±0.08
±0.25
1.6
3
70
MAX
2
40
TYP
70
45
±0.25
±1
2
5
70
UNITS
MHz
MHz
dB
dB
deg/MHz
deg
dB
Vo < 4V
pp
Vo = 20V
pp
100KHz to 20MHz
20MHz to 45MHz
DC to 45MHz
refer to graphs
±0.3
±0.6
5V output step
20V output step
settling time to 0.8%
10V output step
overshoot (input rise time
≤
1ns) 5V output step
slew rate
overload recovery (200% od)
< 50ns pulse width
General Information
input offset voltage (drift)
input bias current (drift)
CONDITIONS
3
7
20
5
3
20
MIN
2
4
7
20
5
3
20
TYP
10(25)
10(20)
30(50)
22
48
100K/3
60
64
10, 100
24
MAX
2
32
30
100
56
38
5
7
25
5
3
20
ns
ns
ns
%
V/µs
ns
UNITS
mV(µV/°C)
µV(nA/°C)
µV(nA/°C)
µV
-dBc
Ω/pF
dB
dB
V, mA
mA
non-inverting
inverting
equivalent input noise
1
integrated 0.1 to 100MHz,
(R
s
= 50Ω, gain = 20)
second/third harmonic distortion 20MHz, +10dBm
input impedance
non-inverting
power supply rejection ratio
input referred
common mode rejection ratio
input referred
output drive voltage,current
supply current
45
33
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
NOTES:
1) For Noise Figure, refer to
Distortion and Noise
section in text.
2) 100% tested at +25°C, A
V
= +20, R
L
= 100Ω, and V
CC
= ±15V.
* Refer to
Low Gain Operation
section.
Absolute Maximum Ratings
supply voltage (±V
CC
)
output current (I
o
)
input voltage (V
imax
)
common mode input voltage
power dissipation
junction temperature (T
J
)
storage temperature
still air thermal resistance (θ
ca
)
16V (±5V min)
100mA
(|V
CC
| - 2.5)/A
V
±1/2 |V
CC
|
refer to graph
150°C
-55°C to +150°C
+25°C/W
2
REV. 1A February 2001
KH300
DATA SHEET
KH300 Performance Characteristics
(25°C, V
CC
= ±15V, R
L
= 100Ω; unless noted)
Non-Inverting Gain
Inverting Gain
Relative Gain (1dB/div)
A
v
= 4
Relative Gain (1dB/div)
A
v
= 4
A
v
= 20
A
v
= 20
A
v
= 40
A
v
= 40
0
10
20
30
40
50
60
70
80
90 100
0
10
20
30
40
50
60
70
80
90 100
Freguency (MHz)
Broadband Inverting & Non-Inverting Gain
A
v
= 20
Freguency (MHz)
Inverting & Non-Inverting Phase
A
v
= 20
Relative Gain (10dB/div)
0°
Inverting
-180°
-90°
Non-inverting
Inverting
Non-inverting
-270°
-180°
-360°
0
100 200 300 400 500 600 700 800 900 1GHz
0
10
20
30
40
50
60
70
80
90 100
Freguency (MHz)
2nd & 3rd Harmonic Distortion Intercept
90
A
v
= 20
Freguency (MHz)
2-Tone 3rd Order Intermod. Intercept
50
A
v
= 20
Intercept Point (+dBm)
Intercept Point (+dBm)
10
7
10
8
80
70
60
50
40
30
10
4
(I
2
)
2nd harmonic intercept
exceeds 90dBm below 10
5
Hz
45
40
35
30
(I
3
)
3rd harmonic intercept
exceeds 64dBm below 10
5
Hz
25
10
5
10
6
0
20
40
60
80
100
Freguency (Hz)
Non-Inverting Small Signal Pulse Resp.
A
v
= 20
Freguency (MHz)
Inverting Small Signal Pulse Response
A
v
= -20
Output Voltage (1V/div)
Time (5ns/div)
Output Voltage (1V/div)
Time (5ns/div)
REV. 1A February 2001
3
DATA SHEET
KH300
KH300 Performance Characteristics
(25°C, V
CC
= ±15V, R
L
= 100Ω; unless noted)
Large Signal Pulse Response
0.4
A
v
= -20
Settling Time
10V step
A
v
= 20
Output Voltage (2V/div)
0.2
Settling Error (%)
Time (5ns/div)
0
-0.2
-0.4
-0.6
-0.8
0
200
400
600
800
1000
Time (ns)
Relative Bandwidth vs. V
CC
1.1
A
v
= 20
Power Dissipation Derating
2.5
Circuit Power Dissipation (W)
150°C max T
J
V
CC
=
±15V
Relative Bandwidth
1.0
2.0
Case
Ambient
0.9
1.5
0.8
1.0
0.7
4
6
8
10
12
14
16
0.5
-25
0
25
50
75
100
V
CC
(V)
Equivalent Input Noise
100
100
80
Temperature (°C)
Common Mode Rejection Ratio
Voltage Noise (nV/√Hz)
Current Noise (pA/√Hz)
70
Inverting Current
11pA/√Hz
CMRR (dB)
60
50
40
30
10
1
10
2
10
3
10
4
10
5
10
6
10
7
10
Voltage
2.9nV/√Hz
Non-inverting Current
2.3pA/√Hz
10
1
10
2
10
3
10
4
10
5
10
6
10
7
10
8
1
Frequency (Hz)
Power Supply Rejection Ratio
80
70
Frequency (Hz)
CMRR (dB)
60
50
40
30
10
1
10
2
10
3
10
4
10
5
10
6
Frequency (Hz)
4
REV. 1A February 2001
KH300
DATA SHEET
Layout Considerations
To assure optimum performance the user should follow
good layout practices which minimize the unwanted
coupling of signals between nodes. During initial bread-
boarding of the circuit, use direct point to point wiring,
keeping lead lengths to less than 0.25”. The use of
solid, unbroken ground plane is helpful. Avoid wire-wrap
type pc boards and methods. Sockets with small, short
pin receptacles may be used with minimal performance
degradation although their use is not recommended.
+15
and 16. Larger tantalum capacitors should also be
placed within one inch of these pins. To prevent signal
distortion caused by reflections from impedance mis-
matches, use terminated microstrip or coaxial cable
when the signal must traverse more than a few inches.
Since the pc board forms such an important part of the
circuit, much time can be saved if prototype boards of
any high frequency sections are built and tested early in
the design phase.
Controlling Bandwidth and Passband Response
As with any op amp, the ratio of the two feedback resistors
R
f
and R
g
, determines the gain of the KH300. Unlike
conventional op amps, however, the closed loop pole-
zero response of the KH300 is affected very little by the
value of R
g
. R
g
scales the magnitude of the gain, but
does not change the value of the feedback. R
f
does
influence the feedback and so the KH300 has been
internally compensated for optimum performance with
R
f
= 1500Ω, but any value of R
f
> 500Ω may be used
with a single capacitor placed between pins 8 and 12 for
compensation. See table 1. As R
f
decreases, C
c
must
increase to maintain flat gain. Large values of R
f
and
C
c
can be used together or separately to reduce the
bandwidth. This may be desirable for reducing the noise
bandwidth in applications not requiring the full frequency
response available.
Table 1: Bandwidth vs. R
f
and C
c
(A
v
= +20)
0.01µF
V
in
R
i
50Ω
R
g
22µF
16
6
8
+
11
KH300
-
24
13
12
R
o
50Ω
1/2 V
o
R
L
50Ω
-15
22µF
0.01µF
Av = 1 +
R
f
R
g
R
f
= 1500Ω (internal)
Figure 1: Recommended Non-inverting Gain Circuit
+15
R
f
(KΩ)
0.01µF
51
22µF
6
16
C
c
(pF)
0
0
0
0
0.3
1.1
1.9
f
±0.3dB
(MHz)
2
3
8
45
90
95
110
f
-3.0dB
(MHz)
5
12
40
85
115
130
135
V
in
R
i
50Ω
R
g
8
+
11
KH300
-
24
13
12
R
o
50Ω
1/2 V
o
R
L
50Ω
10.0
5.0
2.0
1.5
1.0
0.75
0.50
-15
22µF
0.01µF
For Z
in
= 50Ω Select:
R
g
||R
i
= 50
R
f
-Av =
R
g
R
f
= 1500Ω (internal)
Figure 2: Recommended Inverting Gain Circuit
During pc board layout keep all traces short and direct.
R
f
and R
g
should be as close as possible to pin 8 to
minimize capacitance at that point. For the same reason,
remove ground plane from the vicinity of pins 8 and 6. In
other areas, use as much ground plane as possible on
one side of the pc board. It is especially important to
provide a ground return path for current from the load
resistor to the power supply bypass capacitors. Ceramic
capacitors of 0.01 to 0.1µF should be close to pins 13
Low Gain Operation
The small amount of stray capacitance present at the
inverting input can cause peaking which increases with
decreasing gain. The gain setting resistor R
g
is effectively
in parallel with this capacitance and so a frequency
domain pole results. With small R
g
(Gain > 8), this pole
is at a high frequency and it affects the closed loop gain
of the KH300 only slightly. At lower values of gain, this
pole becomes significant. For example, at a gain of +2,
the gain may peak as much as 3dB at 75MHz, and have
a bandwidth exceeding 150MHz. The same behavior
does not exist for low inverting gains, however, since the
inverting input is a virtual ground which maintains a
constant voltage across the stray capacitance. Even at
inverting gains << 1, the frequency response remains
unchanged.
REV. 1A February 2001
5
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