The VI BRICK Pre-Regulator Module is a very efficient non-isolated regulator specifically
designed to provide a controlled Factorized Bus distribution voltage for powering
downstream VI BRICK Voltage Transformation Modules. In combination, VI BRICK PRMs
and VTMs
TM
form a complete DC-DC converter subsystem offering all of the unique
benefits of Vicor’s Factorized Power Architecture (FPA): high density and efficiency; low
noise operation; architectural flexibility; extremely fast transient response; elimination of
bulk capacitance at the Point-of-Load (POL); in a thermally enhanced package.
Part Numbering
PR
045
Input
Voltage
Designator
A
Package
Size
048
Output
Voltage
Designator
(=V
OUT
x10)
T
017
Output
Power
Designator
(=P
OUT
/10)
F
P
Pre-Regulator
Module
Product Grade Temperatures (°C)
Grade
T=
Operating
Storage
Baseplate
F
= Slotted flange
T
= Transverse heat sink
[a]
[a]
Contact
Pin Style
P
= Through hole
-40 to +100 -40 to +125
factory
Pre-Regulator Module
PR045A048T017FP
vicorpower.com
Rev. 1.0
Page 1 of 13
SPECIFICATIONS
Electrical characteristics apply over the full operating range of input voltage, output load (resistive) and baseplate temperature,
unless otherwise specified. All temperatures refer to the operating temperature at the center of the baseplate.
Absolute Maximum Ratings
Parameter
+In to -In
PC to -In
PR to -In
IL to -In
VC to -In
+Out to -Out
SC to -Out
VH to -Out
OS to -Out
CD to -Out
SG to -Out
Continuous output current
Continuous output power
Operating temperature
Storage temperature
Values
-1.0 to 85.0
-0.3 to 6.0
-0.3 to 9.0
-0.3 to 6.0
-0.3 to 18.0
-0.3 to 59
-0.3 to 3.0
-0.3 to 9.5
-0.3 to 9.0
-0.3 to 9.0
100
3.54
170
-40 to +100
-40 to +125
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
mA
Adc
W
°C
°C
T-Grade; baseplate
T-Grade
Notes
Note:
Stresses in excess of the maximum ratings can cause permanent damage to the device. Operation of the device is not implied at these or any other conditions
in excess of those given in the specification. Exposure to absolute maximum ratings can adversely affect device reliability.
Input Specifications
Parameter
Input voltage range
Input dV/dt
Input undervoltage turn-on
Input undervoltage turn-off
Input overvoltage turn-on
Input overvoltage turn-off
Input quiescent current
Input current
Input reflected ripple current
No load power dissipation
Internal input capacitance
(Conditions are at 45 Vin, 48 Vf
[a]
, full load, and 25°C ambient unless otherwise specified)
Min
38
Typ
45
35.7
32.1
55.3
33.6
56.6
57.7
0.5
4.0
470
2.9
5
100
5.8
59.4
1
Max
55
1
37.3
Unit
Vdc
V/µs
Vdc
Vdc
Vdc
Vdc
mA
Adc
mA p-p
W
µF
µF
Ceramic
See Figure 4 for input filter circuit.
Source impedance dependent
See Figures 3 & 4
PC low
Notes
Recommended external input capacitance
[a]
Vf is factorized bus voltage (see Figure 15).
Pre-Regulator Module
PR045A048T017FP
vicorpower.com
Rev. 1.0
Page 2 of 13
SPECIFICATIONS (CONT.)
INPUT WAVEFORMS
Figure 1
—
Vf and PC response from power up
Figure 2
—
Vf turn-on waveform with inrush current – PC enabled
Reflected
Ripple
Measurement
[a]
VC
PC
TM
IL
NC
PR
+IN
VH
SC
SG
OS
NC
CD
2.37 kΩ
7A
+IN
100
μF
Al-Electrolytic
PRM
+OUT
+ OUT
–IN
-IN
-OUT
– OUT
[a]
See Input Fuse Recommendations section
Figure 3
—
Input reflected ripple current
Figure 4
—
Input filter capacitor recommendation
Pre-Regulator Module
PR045A048T017FP
vicorpower.com
Rev. 1.0
Page 3 of 13
SPECIFICATIONS (CONT.)
Output Specifications
Parameter
Output voltage range
Output power
Output current
DC current limit
Average short circuit current
Set point accuracy
Line regulation
Load regulation
Load regulation (at VTM output)
Current share accuracy
Efficiency
Full load
Output overvoltage set point
Output ripple voltage
No external bypass
With 10 µF capacitor
Switching frequency
Output turn-on delay
From application of power
From PC pin high
Internal output capacitance
Factorized Bus capacitance
(Conditions are at 45 Vin, 48 Vf
[a]
, full load, and 25°C ambient unless otherwise specified)
便携式数字数据采集系统（PDDAS）使用了LabVIEW实时模块和PXI，以控制风洞测试和采集记录来自128个不同通道的空气压力数据 "通过LabVIEW实时模块，可以在各种操作情况下获得采集空气压力数据及向风洞提供反馈控制信号所需的确定性响应时间。" – Dave Scheibenhoffer, G Systems 挑战: 用一个可采集、分析和存储来自下一代喷气式战斗机引擎设计的动...[详细]
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