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74LVC1G99GT: 产品描述Ultra-configurable multiple function gate; 3-state; 产品类别逻辑逻辑; 文件大小201KB，共29页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

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74LVC1G99GT概述

Ultra-configurable multiple function gate; 3-state

74LVC1G99GT规格参数

参数名称	属性值
Source Url Status Check Date	2013-06-14 00:00:00
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	NXP(恩智浦)
零件包装代码	SON
包装说明	1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8
针数	8
Reach Compliance Code	compli
系列	LVC/LCX/Z
JESD-30 代码	R-PDSO-N8
JESD-609代码	e3
长度	1.95 mm
负载电容（CL）	50 pF
逻辑集成电路类型	MAJORITY LOGIC GATE
最大I（ol）	0.024 A
湿度敏感等级	1
功能数量	1
输入次数	4
端子数量	8
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
封装主体材料	PLASTIC/EPOXY
封装代码	VSON
封装等效代码	SOLCC8,.04,20
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, VERY THIN PROFILE
包装方法	TAPE AND REEL
峰值回流温度（摄氏度）	260
电源	3.3 V
Prop。Delay @ Nom-Su	10.8 ns
传播延迟（tpd）	38.5 ns
认证状态	Not Qualified
施密特触发器	YES
座面最大高度	0.5 mm
最大供电电压 (Vsup)	5.5 V
最小供电电压 (Vsup)	1.65 V
标称供电电压 (Vsup)	2.3 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Tin (Sn)
端子形式	NO LEAD
端子节距	0.5 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
宽度	1 mm

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74LVC1G99

Ultra-configurable multiple function gate; 3-state

Rev. 04 — 16 April 2010

Product data sheet

1. General description

The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with

3-state output. The device can be configured as one of several logic functions including,

AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components

are required to configure the device as all inputs can be connected directly to V

GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE

causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the

output state is determined by the signals applied to the Schmitt-trigger inputs (A, B, C and

D).

Due to the use of Schmitt-trigger inputs the device is tolerant of slowly changing input

signals, transforming them into sharply defined, jitter free output signals. By eliminating

leakage current paths to V

and GND, the inputs and disabled output are also

over-voltage tolerant, making the device suitable for mixed-voltage applications.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.

2. Features and benefits

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant inputs for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8-B/JESD36 (2.7 V to 3.6 V)

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

±24

mA output drive (V

= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Specified from

−40 °C

to +85

°C

and

−40 °C

to +125

°C.

74LVC1G99GT相似产品对比

	74LVC1G99GT	74LVC1G99GF	74LVC1G99	74LVC1G99GM	74LVC1G99DP	74LVC1G99GD	74LVC1G99_10
描述	Ultra-configurable multiple function gate; 3-state	Ultra-configurable multiple function gate; 3-state	Ultra-configurable multiple function gate; 3-state	Ultra-configurable multiple function gate; 3-state	Ultra-configurable multiple function gate; 3-state	Ultra-configurable multiple function gate; 3-state	Ultra-configurable multiple function gate; 3-state
是否Rohs认证	符合	符合	-	符合	符合	符合	-
厂商名称	NXP(恩智浦)	NXP(恩智浦)	-	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	-
零件包装代码	SON	SON	-	QFN	SOIC	SON	-
包装说明	1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8	1.35 X 1 MM, 0.50 MM HEIGHT, MO-252, SOT-1089, SON-8	-	1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8	3 MM, PLASTIC, SOT505-2, TSSOP-8	3 X 2 MM, 0.50 MM HEIGHT, PLASTIC, SOT996-2, SON-8	-
针数	8	8	-	8	8	8	-
Reach Compliance Code	compli	unknow	-	compli	compli	unknow	-
系列	LVC/LCX/Z	LVC/LCX/Z	-	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	-
JESD-30 代码	R-PDSO-N8	R-PDSO-N8	-	S-PQCC-N8	S-PDSO-G8	R-PDSO-N8	-
JESD-609代码	e3	e3	-	e4	e4	-	-
长度	1.95 mm	1.35 mm	-	1.6 mm	3 mm	3 mm	-
逻辑集成电路类型	MAJORITY LOGIC GATE	MAJORITY LOGIC GATE	-	MAJORITY LOGIC GATE	MAJORITY LOGIC GATE	MAJORITY LOGIC GATE	-
湿度敏感等级	1	1	-	1	1	1	-
功能数量	1	1	-	1	1	1	-
输入次数	4	4	-	4	4	4	-
端子数量	8	8	-	8	8	8	-
最高工作温度	125 °C	125 °C	-	125 °C	125 °C	125 °C	-
最低工作温度	-40 °C	-40 °C	-	-40 °C	-40 °C	-40 °C	-
输出特性	3-STATE	3-STATE	-	3-STATE	3-STATE	3-STATE	-
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
封装代码	VSON	VSON	-	VQCCN	TSSOP	VSON	-
封装形状	RECTANGULAR	RECTANGULAR	-	SQUARE	SQUARE	RECTANGULAR	-
封装形式	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE	-	CHIP CARRIER, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE	-
峰值回流温度（摄氏度）	260	260	-	260	260	260	-
传播延迟（tpd）	38.5 ns	38.5 ns	-	38.5 ns	38.5 ns	38.5 ns	-
认证状态	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	-
座面最大高度	0.5 mm	0.5 mm	-	0.5 mm	1.1 mm	0.5 mm	-
最大供电电压 (Vsup)	5.5 V	5.5 V	-	5.5 V	5.5 V	5.5 V	-
最小供电电压 (Vsup)	1.65 V	1.65 V	-	1.65 V	1.65 V	1.65 V	-
标称供电电压 (Vsup)	2.3 V	2.3 V	-	2.3 V	2.3 V	2.3 V	-
表面贴装	YES	YES	-	YES	YES	YES	-
技术	CMOS	CMOS	-	CMOS	CMOS	CMOS	-
温度等级	AUTOMOTIVE	AUTOMOTIVE	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	-
端子面层	Tin (Sn)	PURE TIN	-	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	-	-
端子形式	NO LEAD	NO LEAD	-	NO LEAD	GULL WING	NO LEAD	-
端子节距	0.5 mm	0.35 mm	-	0.5 mm	0.65 mm	0.5 mm	-
端子位置	DUAL	DUAL	-	QUAD	DUAL	DUAL	-
处于峰值回流温度下的最长时间	30	30	-	30	30	30	-
宽度	1 mm	1 mm	-	1.6 mm	3 mm	2 mm	-

74LVC1G99GT

74LVC1G99GT概述

74LVC1G99GT规格参数

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74LVC1G99GT相似产品对比

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