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IDT70T3599S133BFGI

产品描述Dual-Port SRAM, 128KX36, 15ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, GREEN, FPBGA-208
产品类别存储    存储   
文件大小390KB,共28页
制造商IDT (Integrated Device Technology)
标准  
下载文档 详细参数 选型对比 全文预览

IDT70T3599S133BFGI概述

Dual-Port SRAM, 128KX36, 15ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, GREEN, FPBGA-208

IDT70T3599S133BFGI规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码BGA
包装说明LFBGA, BGA208,17X17,32
针数208
Reach Compliance Codecompliant
ECCN代码3A991
最长访问时间15 ns
其他特性PIPELINED OR FLOW-THROUGH ARCHITECTURE
最大时钟频率 (fCLK)133 MHz
I/O 类型COMMON
JESD-30 代码S-PBGA-B208
JESD-609代码e1
长度15 mm
内存密度4718592 bit
内存集成电路类型DUAL-PORT SRAM
内存宽度36
湿度敏感等级3
功能数量1
端口数量2
端子数量208
字数131072 words
字数代码128000
工作模式SYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织128KX36
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码LFBGA
封装等效代码BGA208,17X17,32
封装形状SQUARE
封装形式GRID ARRAY, LOW PROFILE, FINE PITCH
并行/串行PARALLEL
峰值回流温度(摄氏度)260
电源2.5,2.5/3.3 V
认证状态Not Qualified
座面最大高度1.7 mm
最大待机电流0.02 A
最小待机电流2.4 V
最大压摆率0.45 mA
最大供电电压 (Vsup)2.6 V
最小供电电压 (Vsup)2.4 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Silver/Copper (Sn/Ag/Cu)
端子形式BALL
端子节距0.8 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间30
宽度15 mm

文档预览

下载PDF文档
Features:
HIGH-SPEED 2.5V
256/128/64K x 36
IDT70T3519/99/89S
SYNCHRONOUS
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed data access
– Commercial: 3.4 (200MHz)/3.6ns (166MHz)/
4.2ns (133MHz)(max.)
– Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 5ns cycle time, 200MHz operation (14Gbps bandwidth)
– Fast 3.4ns clock to data out
– 1.5ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 200MHz
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
Interrupt and Collision Detection Flags
Separate byte controls for multiplexed bus and bus
matching compatibility
Dual Cycle Deselect (DCD) for Pipelined Output Mode
2.5V (±100mV) power supply for core
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
Available in a 256-pin Ball Grid Array (BGA), a 208-pin
Plastic Quad Flatpack (PQFP) and 208-pin fine pitch Ball
Grid Array (fpBGA)
Supports JTAG features compliant with IEEE 1149.1
Due to limited pin count JTAG is not supported on the 208-
pin PQFP package
Green parts available, see ordering information
Functional Block Diagram
BE
3L
BE
2L
BE
1L
BE
0L
BE
3R
BE
2R
BE
1R
BE
0R
FT/PIPE
L
1/0
0a 1a
a
0b 1b
b
0c 1c
c
0d 1d
d
1d 0d
d
1c 0c
c
1b 0b
b
1a 0a
a
1/0
FT/PIPE
R
R/W
L
R/W
R
CE
0L
CE
1L
1
0
1/0
B
W
0
L
B
W
1
L
B B B
WWW
2 3 3
L L R
B
W
2
R
B B
WW
1 0
R R
1
0
1/0
CE
0R
CE
1R
OE
L
OE
R
Dout0-8_L
Dout9-17_L
Dout18-26_L
Dout27-35_L
Dout0-8_R
Dout9-17_R
Dout18-26_R
Dout27-35_R
1d 0d 1c 0c 1b 0b 1a 0a
0a 1a 0b 1b 0c 1c 0d 1d
0/1
,
FT/PIPE
R
FT/PIPE
L
0/1
abc d
d cba
256/128/64K x 36
MEMORY
ARRAY
I/O
0L
- I/O
35L
Din_L
Din_R
I/O
0R
- I/O
35R
CLK
L
A
17L(1)
A
0L
REPEAT
L
ADS
L
CNTEN
L
A
17R(1)
CLK
R
,
Counter/
Address
Reg.
ADDR_L
ADDR_R
Counter/
Address
Reg.
A
0R
REPEAT
R
ADS
R
CNTEN
R
TDI
TCK
TMS
TRST
CE
0 L
CE1L
R /
W
L
INTERRUPT
COLLISION
DETECTION
LOGIC
CE
0 R
CE1 R
R/
W
R
JTAG
TDO
COL
R
INT
R
COL
L
INT
L
ZZ
L
(2)
NOTES:
1. Address A
17
is a NC for the IDT70T3599. Also, Addresses A
17
and A
16
are NC's for the IDT70T3589.
2. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when asserted. All static inputs, i.e., PL/FTx and OPTx
and the sleep mode pins themselves (ZZx) are not affected during sleep mode.
ZZ
CONTROL
LOGIC
ZZ
R
(2)
5666 drw 01
MARCH 2014
DSC 5666/11
1
©2014 Integrated Device Technology, Inc.

IDT70T3599S133BFGI相似产品对比

IDT70T3599S133BFGI IDT70T3599S200BCG IDT70T3519S166BCGI IDT70T3519S166BFG8 IDT70T3519S133BFGI8 IDT70T3599S133BFGI8
描述 Dual-Port SRAM, 128KX36, 15ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, GREEN, FPBGA-208 Dual-Port SRAM, 128KX36, 10ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256 Dual-Port SRAM, 256KX36, 12ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256 Multi-Port SRAM, 256KX36, 12ns, CMOS, PBGA208 Multi-Port SRAM, 256KX36, 15ns, CMOS, PBGA208 Multi-Port SRAM, 128KX36, 15ns, CMOS, PBGA208
是否无铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅
是否Rohs认证 符合 符合 符合 符合 符合 符合
包装说明 LFBGA, BGA208,17X17,32 LBGA, BGA256,16X16,40 LBGA, BGA256,16X16,40 FBGA, BGA208,17X17,32 FBGA, BGA208,17X17,32 FBGA, BGA208,17X17,32
Reach Compliance Code compliant compli compliant compliant compliant compliant
ECCN代码 3A991 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991
最长访问时间 15 ns 10 ns 12 ns 12 ns 15 ns 15 ns
最大时钟频率 (fCLK) 133 MHz 200 MHz 166 MHz 166 MHz 133 MHz 133 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 S-PBGA-B208 S-PBGA-B256 S-PBGA-B256 S-PBGA-B208 S-PBGA-B208 S-PBGA-B208
JESD-609代码 e1 e1 e1 e1 e1 e1
内存密度 4718592 bit 4718592 bi 9437184 bit 9437184 bit 9437184 bit 4718592 bit
内存集成电路类型 DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM
内存宽度 36 36 36 36 36 36
湿度敏感等级 3 3 3 3 3 3
端口数量 2 2 2 2 2 2
端子数量 208 256 256 208 208 208
字数 131072 words 131072 words 262144 words 262144 words 262144 words 131072 words
字数代码 128000 128000 256000 256000 256000 128000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 85 °C 70 °C 85 °C 70 °C 85 °C 85 °C
最低工作温度 -40 °C - -40 °C - -40 °C -40 °C
组织 128KX36 128KX36 256KX36 256KX36 256KX36 128KX36
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LFBGA LBGA LBGA FBGA FBGA FBGA
封装等效代码 BGA208,17X17,32 BGA256,16X16,40 BGA256,16X16,40 BGA208,17X17,32 BGA208,17X17,32 BGA208,17X17,32
封装形状 SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
封装形式 GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) 260 260 260 260 260 260
电源 2.5,2.5/3.3 V 2.5,2.5/3.3 V 2.5,2.5/3.3 V 2.5,2.5/3.3 V 2.5,2.5/3.3 V 2.5,2.5/3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
最大待机电流 0.02 A 0.015 A 0.02 A 0.015 A 0.015 A 0.02 A
最小待机电流 2.4 V 2.4 V 2.4 V 2.4 V 2.4 V 2.4 V
最大压摆率 0.45 mA 0.525 mA 0.51 mA 0.45 mA 0.45 mA 0.45 mA
表面贴装 YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL
端子面层 Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
端子形式 BALL BALL BALL BALL BALL BALL
端子节距 0.8 mm 1 mm 1 mm 0.8 mm 0.8 mm 0.8 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
处于峰值回流温度下的最长时间 30 30 30 30 30 30
厂商名称 IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Base Number Matches - 1 1 1 1 -

 
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