Datasheet
A S 11 5 4
D u a l LVD S D r i v e r
1 General Description
The AS1154 is a dual Flow-Through LVDS (Low-Voltage Differential
Signaling) Line Driver which accepts and converts LVTTL/LVCMOS
input levels into LVDS output signals. The device is perfect for low-
power low-noise applications requiring high signaling rates and
reduced EMI emissions.
The device is guaranteed to transmit data at speeds up to 800Mbps
(400MHz) over controlled impedance media of approximately 100Ω.
Supported transmission media are PCB traces, backplanes, and
cables.
Outputs conform to the
ANSI TIA/EIA-644 LVDS
standards. Flow-
through pinout simplifies PC board layout and reduces crosstalk by
separating the LVTTL/LVCMOS inputs and LVDS outputs.
The AS1154 operates from a single +3.3V supply and is specified for
operation from -40°C to +85°C.
2 Key Features
Flow-Through Pinout
Guaranteed 800Mbps Data Rate
250ps Pulse Skew (Max)
Conforms to
ANSI TIA/EIA-644
LVDS Standards
Single +3.3V Supply
Operating Temperature Range: -40°C to +85°C
8-Pin SOIC Package
3 Applications
Digital Copiers, Laser Printers, Cellular Phone Base Stations, Add/
Drop Muxes, Digital Cross-Connects, DSLAMs, Network Switches/
Routers, Backplane Interconnect, Clock Distribution Computers,
Intelligent Instruments, Controllers, Critical Microprocessors and
Microcontrollers, Power Monitoring, and Portable/Battery-Powered
Equipment.
Figure 1. AS1154 - Block Diagram
VCC
Tx
OUT1-
IN1
OUT1+
AS1154
IN2
Tx
OUT2+
GND
OUT2-
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AS1154
Datasheet - P i n o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
VCC
IN1
IN2
GND
1
2
8
7
OUT1-
OUT1+
OUT2+
OUT2-
AS1154
3
4
6
5
Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
2
3
4
5
6
7
8
Pin Name
VCC
IN1
IN2
GND
OUT2-
OUT2+
OUT1+
OUT1-
LVTTL/LVCMOS Driver Input
LVTTL/LVCMOS Driver Input
Ground
Inverting LVDS Driver Output
Noninverting LVDS Driver Output
Noninverting LVDS Driver Output
Inverting LVDS Driver Output
Description
Power Supply Input.
Bypass V
CC
to GND with 0.1µF and 0.001µF ceramic capacitors.
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AS1154
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Electrical Parameters
VCC to GND
INx to GND
OUTx+, OUTx- to GND
Short Circuit Duration (OUTx+, OUTx-)
Electrostatic Discharge
Electrostatic Discharge HBM
Continous Power Dissipation (T
A
= +70°C)
Continous Power Dissipation
Continous Power Dissipation Derating Factor
Temperature Ranges and Storage Conditions
Junction Temperature
Storage Temperature Range
-55
+150
+125
ºC
ºC
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/
JEDEC J-STD-020“Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is matte tin
(100% Sn).
Represents a max. floor life time of unlimited
755
9.4
mW
mW / °C
P
T
1
for 8-pin SOIC Package
P
DERATE
2
+/- 4
kV
Norm: MIL 883 E method 3015, INx, OUTx+, OUTx-
-0.3
-0.3
-0.3
5.0
Vcc + 0.3
5.0
V
V
V
Min
Max
Units
Comments
Continuous
Package Body Temperature
+260
ºC
Humidity non-condensing
Moisture Sensitive Level
5
1
85
%
1. Depending on actual PCB layout and PCB used.
2. P
DERATE
derating factor changes the total continuous power dissipation (P
T
) if the ambient temperature is not 70ºC. Therefore for e.g.
T
A
=85ºC calculate P
T
at 85ºC = P
T
- P
DERATE
x (85ºC - 70ºC)
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AS1154
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
DC Electrical Characteristics
V
CC
= +3.0V to +3.6V, T
A
= -40°C to +85°C,
R
L
= 100Ω ±1%, (
Typical values are at V
CC
= +3.3V, T
A
= +25°C) unless otherwise specified;
1
Table 3. DC Electrical Characteristics
Parameter
Operating Temperature Range
LVDS Output (OUtx+, OUTx-)
Differential Output Voltage
Change in Magnitude of V
OD
Between
Complementary Output States
V
OD
Symbol
T
A
Conditions
Min
-40
Typ
Max
+85
Unit
°C
mV
mV
V
mV
V
V
Figure 21 on page 12
Figure 21 on page 12
Figure 21 on page 12
Figure 21 on page 12
250
355
1
450
35
1.375
25
1.6
Δ
V
OD
V
OS
Offset Voltage
Change in Magnitude of V
OS
Between
Complementary Output States
1.125
1.25
4
Δ
V
OS
V
OH
V
OL
I
OSD
I
OS
I
OFF
Output High Voltage
Output Low Voltage
Differential Output Short-Circuit
Current
2
Output Short-Circuit Current
Power-Off Output Current
Inputs (INx)
High-Level Input Voltage
Low-Level Input Voltage
Input Current
Supply Current
No-Load Supply Current
Loaded Supply Current
0.90
V
OD
= 0V
OUTx+ = 0V at INx = V
CC
or
OUTx- = 0V at INx = 0V
V
CC
= 0V or open, OUTx+ = 0V or 3.6V
OUTx- = 0V or 3.6V, R
L
=
∞
-9
-3.7
-20
-9
20
mA
mA
µA
V
IH
V
IL
I
IN
INx = 0V or V
CC
R
L
=
∞
, INx = V
CC
or 0V for all channels
R
L
= 100Ω, INx = V
CC
or 0V for all channels
R
L
= 100Ω, INx = V
CC
or 0V for all channels
2.0
GND
-20
2
5.5
8.5
V
CC
V
V
µA
mA
mA
mA
0.8
20
3.5
7.5
12
I
CC
I
CCL
Notes:
1. Currents into the device are positive, and current out of the device is negative. All voltages are referenced to ground except V
OD
.
2. Guaranteed by correlation data.
3. All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality
Control) methods.
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AS1154
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Switching Characteristics
V
CC
= +3.0V to +3.6V, R
L
= 100Ω ±1%, C
L
= 2.5pF (differential), T
A
= -40°C to +85°C, (Typical values are at V
CC
= +3.3V, T
A
= +25ºC)
unless otherwise
specified;
1, 2, 3, 10
Table 4. Switching Characteristics
Parameter
Differential Propagation Delay,
High-to-Low
Differential Propagation Delay,
Low-to-High
Differential Pulse Skew
4
Differential Channel-to-Channel Skew
5
Differential Part-to-Part Skew
6
Differential Part-to-Part Skew
7
Rise Time
Fall Time
Maximum Operating Frequency
8, 9
Notes:
1. Parameters are guaranteed by design and characterization.
2. C
L
includes probe and jig capacitance.
3. Signal generator conditions for dynamic tests: V
OL
= 0, V
OH
= 2.4V, f = 100MHz, 50% duty cycle, RO = 50
Ω
,
t
R
≤
1ns, t
F
≤
1ns (0 to 100%).
4. t
SKD1
is the magnitude difference of differential propagation delay. t
SKD1
= |t
PHLD
- t
PLHD
|.
5. t
SKD2
is the magnitude difference of t
PHLD
or t
PLHD
of one channel to the t
PHLD
or t
PLHD
of another channel on the same device.
6. t
SKD3
is the magnitude difference of any differential propagation delays between devices at the same V
CC
and within 5°C of each other.
7. t
SKD4
is the magnitude difference of any differential propagation delays between devices operating over the rated supply and tempera-
ture ranges.
8. f
MAX
signal generator conditions: V
OL
= 0, V
OH
= 2.4V, 50% duty cycle, RO = 50
Ω
,
t
R
≤
1ns, t
F
≤
1ns (0 to 100%).
9. Transmitter output criteria: duty cycle = 45 to 55%, V
OD
³ 250mV.
10. For optimum performance matched circuits should be used.
Symbol
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
f
MAX
Conditions
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
Figure 20 on page 11 and
Figure 21 on page 12
200
200
400
356
352
Min
1.1
1.1
Typ
1.268
1.267
90
110
Max
1.5
1.5
200
250
750
900
800
800
Unit
ns
ns
ps
ps
ps
ps
ps
ps
MHz
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