KM68V1000B, KM68U1000B Family
Document Title
128K x8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0
1.0
2.0
Initial draft
Finalize
Revise
- Change datasheet format
Draft Data
Remark
August 12, 1995 Preliminary
April 12, 1996
March 7, 1998
Final
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision 2.0
March 1998
KM68V1000B, KM68U1000B Family
128K x8 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
•
Process Technology : Poly Load
•
Organization : 128Kx8
•
Power Supply Voltage :
KM68V1000B family : 3.0~3.6V
KM68U1000B family : 2.7~3.3V
•
Low Data Retention Voltage : 2V(Min)
•
Three state output and TTL Compatible
•
Package Type : 32-SOP, 32-TSOP1-0820F/R
CMOS SRAM
GENERAL DESCRIPTION
The KM68V1000B and KM68U1000B families are fabricated
by SAMSUNG′s advanced CMOS process technology. The
families support various operating temperature ranges and
have various package types for user flexibility of system
design. The families also support low data retention voltage for
battery back-up operation with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
KM68V1000BL/L-L
KM68U1000BL/L-L
KM68V1000BLE/LE-L
KM68U1000BLE/LE-L
KM68V1000BLI/LI-L
KM68U1000BLI/LI-L
Operating Temperature
Vcc Range
3.0~3.6V
2.7~3.3V
3.0~3.6V
2.7~3.3V
3.0~3.6V
2.7~3.3V
Speed(ns)
70
1)
/100
100
70
1)
/100
100
70
1)
/100
100
Standby
(I
SB1
, Max)
50/15µA
50/15µA
100/20µA
50/15µA
100/20µA
50/15µA
40mA
32-SOP
32-TSOP1- R/F
Operating
(I
CC2
, Max)
PKG Type
Commercial(0~70°C)
Extended(-25~85°C)
Industrial(-40~85°C)
1. The parameter is measured with 30pF test load.
PIN DESCRIPTION
A11
A9
A8
A13
WE
VCC CS2
A15
A15 VCC
CS2 NC
A16
WE A14
A12
A13 A7
A6
A8
A5
A9
A4
A11
A4
A10 A5
A6
CS1 A7
A12
I/O8
A14
I/O7 A16
NC
I/O6
A15
I/O5 VCC
CS2
I/O4 A13
WE
A8
A9
A11
OE
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O4
I/O5
I/O6
I/O7
I/O8
CS1
A10
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
N.C
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
32-TSOP
Type 1 - Forward
A4
A5
A6
A7
A12
A13
A14
A15
A16
Row
select
Memory array
512 rows
256×8 columns
32-SOP
25
24
23
22
21
20
19
18
17
32-TSOP
Type 1 - Reverse
I/O
1
I/O
8
Data
cont
I/O Circuit
Column select
Data
cont
A0 A1 A2 A3 A8 A9 A10 A11
Name
CS
1
,CS
2
OE
WE
A
0
~A
16
I/O
1
~I/O
8
Vcc
Vss
N.C
Function
Chip Select Inputs
Output Enable Input
Write Enable Input
Address Inputs
Data Inputs/Outputs
Power
Ground
No Connection
CS1
CS2
WE
OE
Control
Logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Revision 2.0
March 1998
KM68V1000B, KM68U1000B Family
PRODUCT LIST
Commercial Temperarure Products
(0~70°C)
Part Name
KM68V1000BLG-7
KM68V1000BLG-10
KM68V1000BLT-7
KM68V1000BLT-10
KM68V1000BLR-7
KM68V1000BLR-10
KM68V1000BLG-7L
KM68V1000BLG-10L
KM68V1000BLT-7L
KM68V1000BLT-10L
KM68V1000BLR-7L
KM68V1000BLR-10L
KM68U1000BLG-10
KM68U1000BLT-10
KM68U1000BLR-10
KM68U1000BLG-10L
KM68U1000BLT-10L
KM68U1000BLR-10L
CMOS SRAM
Industrial Temperarure Products
(-40~85°C)
Part Name
KM68V1000BLGI-7
KM68V1000BLGI-10
KM68V1000BLTI-7
KM68V1000BLTI-10
KM68V1000BLRI-7
KM68V1000BLRI-10
KM68V1000BLGI-7L
KM68V1000BLGI-10L
KM68V1000BLTI-7L
KM68V1000BLTI-10L
KM68V1000BLRI-7L
KM68V1000BLRI-10L
KM68U1000BLGI-10
KM68U1000BLTI-10
KM68U1000BLRI-10
KM68U1000BLGI-10L
KM68U1000BLTI-10L
KM68U1000BLRI-10L
Extended Temperarure Products
(-25~85°C)
Part Name
KM68V1000BLGE-7
KM68V1000BLGE-10
KM68V1000BLTE-7
KM68V1000BLTE-10
KM68V1000BLRE-7
KM68V1000BLRE-10
KM68V1000BLGE-7L
KM68V1000BLGE-10L
KM68V1000BLTE-7L
KM68V1000BLTE-10L
KM68V1000BLRE-7L
KM68V1000BLRE-10L
KM68U1000BLGE-10
KM68U1000BLTE-10
KM68U1000BLRE-10
KM68U1000BLGE-10L
KM68U1000BLTE-10L
KM68U1000BLRE-10L
Function
32-SOP,70ns,3.3V,L
32-SOP,100ns,3.3V,L
32-TSOP F,70ns,3.3V,L
32-TSOP F,100ns,3.3V,L
32-TSOP R,70ns,3.3V,L
32-TSOP R,100ns,3.3V,L
32-SOP,70ns,3.3V,LL
32-SOP,100ns,3.3V,LL
32-TSOP F,70ns,3.3V,LL
32-TSOP F,100ns,3.3V,LL
32-TSOP R,70ns,3.3V,LL
32-TSOP R,100ns,3.3V,LL
32-SOP,100ns,3.0V,L
32-TSOP F,100ns,3.0V,L
32-TSOP R,100ns,3.0V,L
32-SOP,100ns,3.0V,LL
32-TSOP F,100ns,3.0V,LL
32-TSOP R,100ns,3.0V,LL
Function
32-SOP,70ns,3.3V,L
32-SOP,100ns,3.3V,L
32-TSOP F,70ns,3.3V,L
32-TSOP F,100ns,3.3V,L
32-TSOP R,70ns,3.3V,L
32-TSOP R,100ns,3.3V,L
32-SOP,70ns,3.3V,LL
32-SOP,100ns,3.3V,LL
32-TSOP F,70ns,3.3V,LL
32-TSOP F,100ns,3.3V,LL
32-TSOP R,70ns,3.3V,LL
32-TSOP R,100ns,3.3V,LL
32-SOP,100ns,3.0V,L
32-TSOP F,100ns,3.0V,L
32-TSOP R,100ns,3.0V,L
32-SOP,100ns,3.0V,LL
32-TSOP F,100ns,3.0V,LL
32-TSOP R,100ns,3.0V,LL
Function
32-SOP,70ns,3.3V,L
32-SOP,100ns,3.3V,L
32-TSOP F,70ns,3.3V,L
32-TSOP F,100ns,3.3V,L
32-TSOP R,70ns,3.3V,L
32-TSOP R,100ns,3.3V,L
32-SOP,70ns,3.3V,LL
32-SOP,100ns,3.3V,LL
32-TSOP F,70ns,3.3V,LL
32-TSOP F,100ns,3.3V,LL
32-TSOP R,70ns,3.3V,LL
32-TSOP R,100ns,3.3V,LL
32-SOP,100ns,3.0V,L
32-TSOP F,100ns,3.0V,L
32-TSOP R,100ns,3.0V,L
32-SOP,100ns,3.0V,LL
32-TSOP F,100ns,3.0V,LL
32-TSOP R,100ns,3.0V,LL
FUNCTIONAL DESCRIPTION
CS
1
H
X
1)
L
L
L
CS
2
X
1)
L
H
H
H
OE
X
1)
X
1)
H
L
X
1)
WE
X
1)
X
1)
H
H
L
I/O Pin
High-Z
High-Z
High-Z
Dout
Din
Mode
Deselected
Deselected
Output Disabled
Read
Write
Power
Standby
Standby
Active
Active
Active
1. X means don′t care(Must be in high or low status.)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Symbol
V
IN
,V
OU
V
CC
P
D
T
STG
T
A
Ratings
-0.5 to V
CC
+0.5
-0.3 to 4.6
0.7
-65 to 150
0 to 70
-25 to 85
-40 to 85
Soldering temperature and time
T
SOLDER
260°C, 10sec (Lead Only)
Unit
V
V
W
°C
°C
°C
°C
-
Remark
-
-
-
-
KM68V1000BL, KM68U1000BL
KM68V1000BLE, KM68U1000BLE
KM68V1000BLI, KM68U1000BLI
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Revision 2.0
March 1998
KM68V1000B, KM68U1000B Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Product
KM68V1000B Family
KM68U1000B Family
All Family
KM68V1000B, KM68U1000B Family
KM68V1000B, KM68U1000B Family
Min
3.0
2.7
0
2.2
-0.3
3)
Typ
3.3
3.0
0
-
-
CMOS SRAM
Max
3.6
3.3
0
Vcc+0.3
2)
0.4
Unit
V
V
V
V
Note:
1. Commercial Product : TA=0 to 70°C, unless otherwise specified
Extended Product : TA=-25 to 85°C, unless otherwise specified
Industrial Product : TA=-40 to 85°C, unless otherwise specified
2. Overshoot : V
CC
+3.0V in case of pulse width≤30ns
3. Undershoot : -3.0V in case of pulse width≤30ns
4. Overshoot and undershoot are sampled, not 100% tested
CAPACITANCE
1)
(f=1MHz, TA=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled not, 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
6
8
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Average operating current
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
KM68V1000BL/L-L
KM68V1000BLE/LE-L
KM68V1000BLI/LI-L
I
SB1
KM68U1000BL/L-L
KM68U1000BLE/LE-L
KM68U1000BLI/LI-L
V
OL
V
OH
I
SB
V
IN
=Vss to Vcc
CS
1
=V
IH
or CS
2
=V
IL
or WE=V
IL,
Vio=Vss to Vcc
CS
1
=V
IL
,CS
2
=V
IH
,V
IN
=V
IH
or V
IL
, I
IO
=0mA
Cycle time=1µs
,
100% duty, I
IO
=0mA, CS
1
≤0.2V,
CS
2
≥V
CC
-0.2V, V
IN
≤0.2V
or V
IN
≥V
CC
-0.2V
Min cycle, 100% duty, I
IO
=0mA, CS
1
=V
IL
, CS
2
=V
IH
I
OL
=2.1mA
I
OH
=-1.0mA
CS
1
=V
IH,
CS
2
=V
IL
Low Power
Low Low Power
CS
1
≥Vcc-0.2V
CS
2
≥Vcc-0.2V
or CS
2
≤0.2V
Other input =0~Vcc
Low Power
Low Low Power
Low Power
Low Low Power
Low Power
Low Low Power
Test Conditions
Min
-1
-1
-
-
-
-
2.2
-
-
-
-
-
-
-
-
-
Typ
-
-
2
3
30
-
-
-
1.0
0.5
1.0
0.5
1.0
0.5
1.0
0.5
Max
1
1
5
5
40
0.4
-
0.3
50
15
100
20
50
15
50
15
Unit
µA
µA
mA
mA
mA
V
V
mA
µA
µA
µA
µA
Standby
Current
(CMOS)
Revision 2.0
March 1998
KM68V1000B, KM68U1000B Family
AC OPERATING CONDITIONS
TEST CONDITIONS
( Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : C
L
=100pF+1TTL
C
L
=30pF+1TTL
C
L1)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS
(Commercial product :T
A
=0 to 70°C, Extended product :T
A
=-25 to 85°C, Industrial product : T
A
=-40 to 85°C
KM68V1000B Family:Vcc=3.0~3.6V, KM68U1000B Family:Vcc=2.7~3.3V)
Speed Bins
Parameter List
Symbol
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Read
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
70
-
-
-
10
5
0
0
10
70
60
0
60
55
0
0
30
0
5
70ns
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
Min
100
-
-
-
10
5
0
0
15
100
80
0
80
70
0
0
40
0
5
100ns
Max
-
100
100
50
-
-
30
30
-
-
-
-
-
-
-
30
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
V
DR
KM68V1000BL/L-L
KM68V1000BLE/LE-L
KM68V1000BLI/LI-L
Data retention current
I
DR
KM68U1000BL/L-L
KM68U1000BLE/LE-L
KM68U1000BLI/LI-L
Data retention set-up time
Recovery time
t
SDR
t
RDR
Vcc=3.0V
CS
1
≥Vcc-0.2V
CS
2
≥Vcc-0.2V
or CS
2
≤0.2V
Symbol
Test Condition
CS
1
1)
≥Vcc-0.2V
Low Power
Low Low Power
Low Power
Low Low Power
Low Power
Low Low Power
Low Power
Low Low Power
See data retention waveform
Min
2.0
-
-
-
-
-
-
-
-
0
5
Typ
-
1
0.5
-
-
-
-
-
-
-
-
Max
3.6
30
15
50
20
25
10
25
15
-
-
ms
Unit
V
µA
1. CS≥V
CC
-0.2V, CS
2
≥V
CC
-0.2V(CS
1
controlled) or CS
2
≤0.2V(CS
2
controlled)
Revision 2.0
March 1998
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