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IDT71V25761S200PF: 产品描述Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100; 产品类别存储存储; 文件大小267KB，共21页; 制造商IDT (Integrated Device Technology)

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IDT71V25761S200PF概述

Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100

IDT71V25761S200PF规格参数

参数名称	属性值
是否Rohs认证	不符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	QFP
包装说明	14 X 20 MM, PLASTIC, TQFP-100
针数	100
Reach Compliance Code	not_compliant
ECCN代码	3A991.B.2.A
最长访问时间	3.1 ns
其他特性	PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)	200 MHz
I/O 类型	COMMON
JESD-30 代码	R-PQFP-G100
JESD-609代码	e0
长度	20 mm
内存密度	4718592 bit
内存集成电路类型	CACHE SRAM
内存宽度	36
湿度敏感等级	3
功能数量	1
端子数量	100
字数	131072 words
字数代码	128000
工作模式	SYNCHRONOUS
最高工作温度	70 °C
最低工作温度
组织	128KX36
输出特性	3-STATE
封装主体材料	PLASTIC/EPOXY
封装代码	LQFP
封装等效代码	QFP100,.63X.87
封装形状	RECTANGULAR
封装形式	FLATPACK, LOW PROFILE
并行/串行	PARALLEL
峰值回流温度（摄氏度）	240
电源	2.5,3.3 V
认证状态	Not Qualified
座面最大高度	1.6 mm
最大待机电流	0.03 A
最小待机电流	3.14 V
最大压摆率	0.36 mA
最大供电电压 (Vsup)	3.465 V
最小供电电压 (Vsup)	3.135 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	Tin/Lead (Sn85Pb15)
端子形式	GULL WING
端子节距	0.65 mm
端子位置	QUAD
处于峰值回流温度下的最长时间	20
宽度	14 mm

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128K X 36

IDT71V25761YS/S

3.3V Synchronous SRAMs

2.5V I/O, Pipelined Outputs,

Burst Counter, Single Cycle Deselect

◆

Features

◆

128K x 36 memory configuration

Supports high system speed:

Commercial:

– 200MHz 3.1ns clock access time

Commercial and Industrial:

– 183MHz 3.3ns clock access time

– 166MHz 3.5ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte write

enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

2.5V I/O

Optional - Boundary Scan JTAG Interface (IEEE 1149.1

Compliant)

Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball

grid array

Description

The IDT71V25761 are high-speed SRAMs organized as 128K x 36.

The IDT71V25761 SRAMs contain write, data, address and control

registers. Internal logic allows the SRAM to generate a self-timed write

based upon a decision which can be left until the end of the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V25761 can provide four cycles of data for

a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V25761 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array

(BGA) and 165 fine pitch ball grid array (fBGA).

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

TMS

TDI

TCK

TDO

TRST

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Test Clock

Test Data Output

JTAG Reset (Optional)

Sleep Mode

Data Input / Output

Core Power, I/O Power

Ground

Input

Output

Input

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

N/A

Synchronous

Asynchronous

Synchronous

N/A

5297 tbl 01

JULY 2014

DSC-5297/06

IDT71V25761S200PF相似产品对比

	IDT71V25761S200PF	IDT71V25761YS200PF	IDT71V25761YSA166BQGI	71V25761YS200PFG	71V25761S166PFGI	IDT71V25761S166PF	IDT71V25761S166PF8	IDT71V25761S200PF8	IDT71V25761S183PF8	IDT71V25761S183PF
描述	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA165, FBGA-165	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 20 X 14 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.5ns, CMOS, PQFP100, 20 X 14 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.5ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.3ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 3.3ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
厂商名称	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
零件包装代码	QFP	QFP	BGA	QFP	QFP	QFP	QFP	QFP	QFP	QFP
包装说明	14 X 20 MM, PLASTIC, TQFP-100	14 X 20 MM, PLASTIC, TQFP-100	TBGA,	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	14 X 20 MM, PLASTIC, TQFP-100	14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100	14 X 20 MM, PLASTIC, TQFP-100
针数	100	100	165	100	100	100	100	100	100	100
Reach Compliance Code	not_compliant	not_compliant	unknown	unknown	compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN代码	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
是否Rohs认证	不符合	不符合	-	符合	符合	不符合	不符合	不符合	不符合	不符合
最长访问时间	3.1 ns	3.1 ns	-	3.1 ns	3.5 ns	3.5 ns	3.5 ns	3.1 ns	3.3 ns	3.3 ns
其他特性	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	-	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)	200 MHz	200 MHz	-	200 MHz	166 MHz	166 MHz	166 MHz	200 MHz	183 MHz	183 MHz
I/O 类型	COMMON	COMMON	-	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 代码	R-PQFP-G100	R-PQFP-G100	-	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100
JESD-609代码	e0	e0	-	e3	e3	e0	e0	e0	e0	e0
长度	20 mm	20 mm	-	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm
内存密度	4718592 bit	4718592 bit	-	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit
内存集成电路类型	CACHE SRAM	CACHE SRAM	-	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
内存宽度	36	36	-	36	36	36	36	36	36	36
湿度敏感等级	3	3	-	3	3	3	3	3	3	3
功能数量	1	1	-	1	1	1	1	1	1	1
端子数量	100	100	-	100	100	100	100	100	100	100
字数	131072 words	131072 words	-	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words	131072 words
字数代码	128000	128000	-	128000	128000	128000	128000	128000	128000	128000
工作模式	SYNCHRONOUS	SYNCHRONOUS	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	70 °C	70 °C	-	70 °C	85 °C	70 °C	70 °C	70 °C	70 °C	70 °C
组织	128KX36	128KX36	-	128KX36	128KX36	128KX36	128KX36	128KX36	128KX36	128KX36
输出特性	3-STATE	3-STATE	-	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	LQFP	LQFP	-	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP
封装等效代码	QFP100,.63X.87	QFP100,.63X.87	-	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87
封装形状	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	-	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
并行/串行	PARALLEL	PARALLEL	-	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
峰值回流温度（摄氏度）	240	240	-	NOT SPECIFIED	260	240	240	240	240	240
电源	2.5,3.3 V	2.5,3.3 V	-	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V	2.5,3.3 V
认证状态	Not Qualified	Not Qualified	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.6 mm	1.6 mm	-	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm
最大待机电流	0.03 A	0.03 A	-	0.03 A	0.035 A	0.03 A	0.03 A	0.03 A	0.03 A	0.03 A
最小待机电流	3.14 V	3.14 V	-	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V
最大压摆率	0.36 mA	0.36 mA	-	0.36 mA	0.33 mA	0.32 mA	0.32 mA	0.36 mA	0.34 mA	0.34 mA
最大供电电压 (Vsup)	3.465 V	3.465 V	-	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V
最小供电电压 (Vsup)	3.135 V	3.135 V	-	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V
标称供电电压 (Vsup)	3.3 V	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	YES	-	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	-	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	-	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子面层	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	-	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
端子形式	GULL WING	GULL WING	-	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.65 mm	0.65 mm	-	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
端子位置	QUAD	QUAD	-	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
处于峰值回流温度下的最长时间	20	20	-	NOT SPECIFIED	30	20	20	20	20	20
宽度	14 mm	14 mm	-	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm
Base Number Matches	-	1	1	1	1	1	1	-	-	-

IDT71V25761S200PF

IDT71V25761S200PF概述

IDT71V25761S200PF规格参数

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IDT71V25761S200PF相似产品对比

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