74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
Rev. 06 — 6 June 2008
Product data sheet
1. General description
The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the
74LVC3G17 as a translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features
I
I
I
I
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
±24
mA output drive (V
CC
= 3.0 V)
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C
I
I
I
I
I
I
3. Applications
I
Wave and pulse shapers for highly noisy environments
NXP Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
4. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVC3G17DP
74LVC3G17DC
74LVC3G17GT
74LVC3G17GD
74LVC3G17GM
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
TSSOP8
VSSOP8
XSON8
XSON8U
XQFN8U
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1
×
1.95
×
0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; UTLP based; body 3
×
2
×
0.5 mm
plastic extremely thin quad flat package; no leads;
8 terminals; UTLP based; body 1.6
×
1.6
×
0.5 mm
Version
SOT505-2
SOT765-1
SOT833-1
SOT996-2
SOT902-1
Type number
5. Marking
Table 2.
Marking codes
Marking code
V17
V17
V17
V17
V17
Type number
74LVC3G17DP
74LVC3G17DC
74LVC3G17GT
74LVC3G17GD
74LVC3G17GM
6. Functional diagram
1A
1Y
3Y
3A
2A
2Y
001aah860
001aah861
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
A
Y
001aab109
Fig 3.
Logic diagram (one gate)
74LVC3G17_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 6 June 2008
2 of 18
NXP Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
7. Pinning information
7.1 Pinning
74LVC3G17
1A
1
8
V
CC
3Y
2
7
1Y
74LVC3G17
1A
3Y
2A
GND
1
2
3
4
001aab106
8
7
6
5
V
CC
1Y
3A
2Y
2A
3
6
3A
GND
4
5
2Y
001aac023
Transparent top view
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
Fig 5.
Pin configuration SOT833-1 (XSON8)
74LVC3G17
terminal 1
index area
1Y
1
V
CC
8
74LVC3G17
1A
3Y
2A
GND
1
2
3
4
8
7
6
5
V
CC
7
1A
3A
1Y
3A
2Y
2Y
2
6
3Y
3
4
5
2A
GND
001aag404
001aai246
Transparent top view
Transparent top view
Fig 6.
Pin configuration SOT996-2 (XSON8U)
Fig 7.
Pin configuration SOT902-1 (XQFN8U)
74LVC3G17_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 6 June 2008
3 of 18
NXP Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
7.2 Pin description
Table 3.
Symbol
Pin description
Pin
SOT505-2, SOT765-1,
SOT833-1 and SOT996-2
1A, 2A, 3A
GND
1Y, 2Y, 3Y
V
CC
1, 3, 6
4
7, 5, 2
8
SOT902-1
7, 5, 2
4
1, 3, 6
8
data input
ground (0 V)
data output
supply voltage
Description
8. Functional description
Table 4.
Input
nA
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Output
nY
L
H
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
−0.5
−50
−0.5
-
[1]
[1][2]
Max
+6.5
-
+6.5
±50
V
CC
+ 0.5
+6.5
±50
100
-
+150
250
Unit
V
mA
V
mA
V
V
mA
mA
mA
°C
mW
V
O
> V
CC
or V
O
< 0 V
Active mode
Power-down mode
V
O
= 0 V to V
CC
−0.5
−0.5
-
-
−100
−65
T
amb
=
−40 °C
to +125
°C
[3]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
For TSSOP8 package: above 55
°C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
°C
the value of P
tot
derates linearly with 8 mW/K.
For XSON8, XSON8U and XQFN8U packages: above 45
°C
the value of P
tot
derates linearly with 2.4 mW/K.
74LVC3G17_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 6 June 2008
4 of 18
NXP Semiconductors
74LVC3G17
Triple non-inverting Schmitt trigger with 5 V tolerant input
10. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
Operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
Conditions
Min
1.65
0
0
−40
Max
5.5
5.5
V
CC
+125
Unit
V
V
V
°C
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
=
−40 °C
to +85
°C
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 100
µA;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
V
OH
HIGH-level output voltage
V
I
= V
IH
or V
IL
I
O
=
−100 µA;
V
CC
= 1.65 V to 5.5 V
I
O
=
−4
mA; V
CC
= 1.65 V
I
O
=
−8
mA; V
CC
= 2.3 V
I
O
=
−12
mA; V
CC
= 2.7 V
I
O
=
−24
mA; V
CC
= 3.0 V
I
O
=
−32
mA; V
CC
= 4.5 V
I
I
I
OFF
I
CC
∆I
CC
C
I
V
OL
input leakage current
power-off leakage current
supply current
additional supply current
input capacitance
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 100
µA;
V
CC
= 1.65 V to 5.5 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
O
= 32 mA; V
CC
= 4.5 V
74LVC3G17_6
Conditions
Min
Typ
[1]
Max
Unit
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.45
0.3
0.4
0.55
0.55
-
-
-
-
-
-
±5
±10
10
500
-
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
pF
V
CC
−
0.1 -
1.2
1.9
2.2
2.3
3.8
[2]
-
-
-
-
-
±0.1
±0.1
0.1
5
3.5
V
I
= 5.5 V or GND; V
CC
= 0 V to 5.5 V
V
I
or V
O
= 5.5 V; V
CC
= 0 V
V
I
= 5.5 V or GND; I
O
= 0 A;
V
CC
= 1.65 V to 5.5 V
V
I
= V
CC
−
0.6 V; I
O
= 0 A;
V
CC
= 2.3 V to 5.5 V
-
-
-
[2]
-
-
T
amb
=
−40 °C
to +125
°C
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.70
0.45
0.60
0.80
0.80
V
V
V
V
V
V
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 6 June 2008
5 of 18
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
